Dual Cast Mirroring for Volatile Memory Failover

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Solution Overview

Problem

Existing data storage systems with mirroring techniques require time and processing resources to read and write data to mirrored volatile memory, as they typically involve reading from one memory and writing to another, which can lead to increased latency and resource utilization during failover scenarios.

Innovation Solution

Implementing dual casting logic in storage systems to create and send simultaneous copies of data to both volatile memories before writing, thereby avoiding the need to read from either memory and reducing latency and resource usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional mirroring reads from one volatile memory and writes to another, then data consistency is maintained, but processing time and resource utilization increase

Engineering Contradiction:
Improvedata consistencyVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system pre-establishes dual cast addresses in both volatile memories before receiving write operations. When data needs to be mirrored, the system directly writes to both pre-configured addresses simultaneously, eliminating the need to read from one memory and write to another sequentially. This preliminary address preparation enables faster mirroring operations while maintaining data consistency.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Instead of reading from one volatile memory and writing to another, the system uses dual casting to create simultaneous copies of data in both volatile memories. The dual cast logic generates two separate write operations that target different volatile memories at the same time, achieving mirroring without the sequential read-write bottleneck of traditional approaches.

Inventive Principle:
Principle #26Copying

2Reliability

If traditional mirroring reads from one volatile memory and writes to another, then data consistency is maintained, but processing resources increase

Engineering Contradiction:
Improvedata consistencyVSAvoidprocessing resources
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system pre-establishes dual cast addresses in both volatile memories before receiving write operations. When data needs to be mirrored, the system directly writes to both pre-configured addresses simultaneously, eliminating the need to read from one memory and write to another sequentially. This preliminary address preparation enables faster mirroring operations while maintaining data consistency.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Instead of reading from one volatile memory and writing to another, the system uses dual casting to create simultaneous copies of data in both volatile memories. The dual cast logic generates two separate write operations that target different volatile memories at the same time, achieving mirroring without the sequential read-write bottleneck of traditional approaches.

Inventive Principle:
Principle #26Copying

3Speed

If dual casting writes to both volatile memories simultaneously, then failover latency is reduced, but device complexity increases

Engineering Contradiction:
Improvefailover response speedVSAvoiddual cast logic complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The dual cast logic is integrated into the existing compute node architecture, allowing the same hardware components to handle both single writes and dual cast writes. The logic reuses existing memory controllers and address translation mechanisms, so the complexity increase is minimized while still achieving simultaneous writes to both volatile memories for reduced failover latency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11537313B1Dual cast mirroring from host devices
Publication Date: 2022.12.27 EMC IP HLDG CO LLC
  • US11537313B1 patent drawing
  • US11537313B1 patent drawing
  • US11537313B1 patent drawing

AI summary

Mirrored volatile memory in a storage system is configured with a dual cast region of addresses. Buffers in the dual cast region are allocated for data associated with a received Write IO. A host IO device associates the dual cast addresses with the data. A switch or CPU complex recognizes the dual cast addresses associated with the data and, in response, creates and sends a first copy of the data to a first volatile memory mirror and creates and sends a second copy of the data to a second volatile memory mirror. The second copy may be sent via PCIe NTB between switches or CPU complexes.