Dual Cavity PCB Assembly for High-Power Phased Array Heat Dissipation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current Chip-on-Board (COB) technology is inadequate for high-power phased array applications due to its limited power handling capability, requiring expensive exotic ceramic materials and complex assemblies, which are costly and have long manufacturing lead times.
Innovation Solution
A dual cavity, high-heat dissipating printed wiring board assembly is manufactured using a method involving a first and second laminate stackup with conductive and dielectric layers, anisotropic conductive film (ACF) for mechanical and electrical connection, and a heatsink for enhanced heat dissipation, reducing assembly complexity and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If traditional COB technology is used for high-power phased arrays, then power handling capability is improved, but manufacturing cost and complexity increase due to requiring exotic ceramic materials and complex multi-part assemblies
Solution Approach 1:
The patent changes the material parameters from traditional COB ceramic substrates to high-frequency laminates with appropriate dielectric constants and loss tangents. This allows the printed wiring board to handle high power levels while maintaining manufacturing simplicity and avoiding exotic materials, thus resolving the contradiction between power handling capability and assembly complexity
Solution Approach 2:
The patent employs composite construction by integrating multiple functional layers including ground planes, RF signal layers, heat dissipation structures, and mounting substrates into a single printed wiring board assembly. This composite approach enables high-power handling through distributed current paths and thermal management while simplifying the overall assembly process compared to traditional multi-part COB constructions
2Power
If traditional COB technology is used for high-power phased arrays, then power handling capability is improved, but manufacturing cost increases due to requiring exotic ceramic materials
Solution Approach 1:
The patent modifies the material selection parameters by choosing standard high-frequency laminates and copper clad substrates instead of expensive exotic ceramics. These parameter changes maintain the ability to handle high power through proper trace geometry, impedance control, and thermal design while dramatically reducing material costs and manufacturing complexity
Solution Approach 2:
The patent replaces expensive, difficult-to-manufacture ceramic components with more economical printed wiring board materials that can be manufactured using standard PCB fabrication processes. This substitution achieves comparable or superior performance at lower cost, effectively applying the principle of using cheaper materials when they can fulfill the functional requirements
3Power
If traditional COB technology is used for high-power phased arrays, then power output requirements are met, but manufacturing lead time increases due to complex assemblies
Solution Approach 1:
The patent merges multiple previously separate components (ground planes, RF signal paths, heat dissipation structures, and mounting substrates) into a single integrated printed wiring board assembly. This consolidation eliminates the need for complex multi-step assembly processes and reduces manufacturing lead time while maintaining the required power output capability through the integrated design
4Power
If higher power levels and frequencies are used to meet communication system demands, then system performance is improved, but heat dissipation requirements increase
Solution Approach 1:
The patent introduces an isotropic conductive adhesive as an intermediary material between the RF circuitry and heat sink. This adhesive serves dual functions: providing electrical connection for RF signals and DC power, and facilitating thermal conduction from the high-power components to the heat dissipation structures, thus enabling higher power operation while managing heat effectively
Solution Approach 2:
The patent implements localized heat dissipation strategies by placing heat sinks and thermal vias specifically at high-power trace locations and active device mounting areas. The ground planes are designed with varying trace densities and impedance characteristics in different regions to optimize both RF performance and thermal management, applying local quality changes to address heat dissipation where it is most critical
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables higher power output and frequency capabilities while reducing manufacturing costs and enhancing reliability, allowing for more compact and affordable high-heat dissipating phased array assemblies.
Implementation Method 1
routing out an anisotropic conductive film (ACF) sheet; placing and aligning the ACF sheet over the lower stackup; inverting and assembling upper stackup onto lower stackup; and curing the ACF to join the stackups together
Implementation Method 2
attaching a heatsink and standoffs to the first stackup
Implementation Method 3
a heatsink for enhanced heat dissipation
Data Source
AI summary
Two panel-sized fully populated printed wiring board assemblies formed together, with an anisotropic epoxy that provides electrical connection for RF signals and DC supplies without the need for wirebonds, mechanical interconnects or solder balls.


