Dual Charge Pump PLL Locking for Faster Frequency Acquisition
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Solution Overview
Problem
Conventional phase-locked loops (PLLs) in oscillators experience significant delays, known as lock acquisition time, which can range from tens of milliseconds, causing operational delays in wireless communication devices upon power-up or mode transitions.
Innovation Solution
A phase-locked loop configuration that includes a voltage-controlled oscillator (VCO) and two charge pumps, where a first charge pump generates an initial control signal to align the output signal with the reference signal's frequency, and a second charge pump adjusts the signal to synchronize it, aided by a lock acquisition circuit that provides a fixed voltage to quickly approximate the desired frequency, reducing the lock acquisition time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If a conventional phase-locked loop configuration is used, then the circuit structure is simple, but the lock acquisition time is long (tens of milliseconds)
Solution Approach 1:
The charge pump function is divided into two independent parts: a first charge pump that operates independently of the phase detector to provide initial frequency alignment, and a second charge pump that operates based on phase detection for final locking. This segmentation allows the first charge pump to pre-align the VCO frequency without waiting for the slow phase detection process, thereby reducing lock acquisition time while maintaining reasonable circuit complexity
Solution Approach 2:
The first charge pump performs preliminary frequency alignment of the VCO output signal with the reference signal before the phase-locked loop completes its normal locking process. By proactively adjusting the VCO frequency in advance based on the reference signal frequency, the system reduces the time required for the phase detector to achieve lock, thus decreasing lock acquisition time without significantly increasing overall system complexity
2Productivity
If the lock acquisition time is reduced, then operational readiness is improved, but power consumption increases due to continuous operation
Solution Approach 1:
The first charge pump performs preliminary frequency alignment quickly upon mode transition or power-up, enabling the oscillator to become operational much faster than conventional PLLs. This reduced lock acquisition time allows the system to return to sleep mode more quickly, thereby reducing overall power consumption despite the additional circuitry
Solution Approach 2:
The system enables intermittent operation by quickly acquiring lock and then transitioning to sleep mode, creating a periodic on-off pattern. The first charge pump is activated only during mode transitions or power-up events to perform rapid frequency alignment, rather than operating continuously, which reduces overall power consumption while maintaining high operational readiness
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution significantly reduces the lock acquisition time of the phase-locked loop, potentially by one hundred times compared to conventional PLLs, allowing for faster operational readiness and reducing power consumption by enabling intermittent operation.
Implementation Method 1
a voltage controlled oscillator (VCO) configured to generate an output signal based on an input reference signal
Implementation Method 2
a first charge pump communicatively coupled to a control input of the VCO and configured to generate, for a duration of time following occurrence of an event, a first control signal
Implementation Method 3
A PLL may be a control system configured to generate an output signal whose phase is related to the phase of the input 'reference' signal
Data Source
AI summary
In accordance with an embodiment of the present disclosure a phase-locked loop comprises a voltage controlled oscillator (VCO) configured to generate an output signal based on an input reference signal. The phase-locked loop further comprises a first charge pump communicatively coupled to a control input of the VCO and configured to generate, for a duration of time following occurrence of an event, a first control signal. The first control signal is independent of the output signal and is for causing the output signal to have a first frequency based on a second frequency of the input reference signal. The phase-locked loop further comprises a second charge pump communicatively coupled to the control input of the VCO. The second charge pump is configured to generate, after the duration of time, a second control signal. The second control signal is adjusted to lock the output signal with the input reference signal according to a phase difference between the output signal and the input reference signal such that the output signal is synchronized with the input reference signal.