Dual-Chip RFID Credential with Parasitic Subordinate Chip
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Solution Overview
Problem
RFID-enabled credentials, such as passports, lack a native tamper-detection capability, making it difficult to determine if the RFID device has been tampered with or if it is functioning correctly, which can lead to security vulnerabilities and potential unauthorized access.
Innovation Solution
A tamper-evident RFID system is implemented using a dual-chip configuration where a subordinate chip is parasitically powered and communicates with the primary chip through a capacitive or inductive coupling, allowing for authentication and integrity verification of both chips, including the exchange of data and digital keys to ensure authenticity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single RFID chip is used in the credential, then the device complexity is low and ease of manufacture is high, but the security and tamper-detection capability are insufficient
Solution Approach 1:
The single RFID chip is divided into two separate chips: a primary chip containing the main credential data and a subordinate chip containing verification data. This segmentation allows each chip to be simpler individually while providing enhanced security through their combined verification capability, resolving the contradiction between security and complexity.
Solution Approach 2:
A capacitive coupling mechanism is introduced as an intermediary between the primary and subordinate chips. This coupling serves as a mediator that enables secure data exchange and verification while maintaining physical separation of the chips, thereby enhancing security without requiring direct integration that would increase complexity.
2Reliability
If a dual-chip configuration with capacitive coupling is implemented, then the tamper-detection capability and security are enhanced, but the manufacturing complexity and device complexity increase
Solution Approach 1:
The subordinate chip is designed to be parasitically powered by the primary chip through the capacitive coupling, eliminating the need for a separate power source for the subordinate chip. This self-service approach reduces manufacturing complexity by removing additional power management components while maintaining the enhanced security of the dual-chip system.
Solution Approach 2:
The primary chip serves multiple functions: it acts as the main credential storage, provides power to the subordinate chip through capacitive coupling, and enables verification operations. This multi-functionality reduces the overall system complexity and manufacturing difficulty compared to having two fully independent chips.
3Reliability
If authentication protocols are implemented to verify both chips, then the security and data integrity are improved, but the operational complexity and processing time increase
Solution Approach 1:
The subordinate chip is pre-configured with verification data and cryptographic keys during manufacturing. This preliminary action allows the authentication protocol to proceed efficiently during operation, as the verification data is already prepared and stored, reducing the computational burden and operational complexity during actual authentication.
Solution Approach 2:
The authentication protocol implements a feedback mechanism where the subordinate chip verifies data from the primary chip and provides immediate verification results. This feedback loop enables rapid authentication decisions without requiring complex external verification systems, thereby maintaining ease of operation while ensuring data integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the security of RFID-enabled credentials by providing a rigorous method to verify the authenticity of the data and the integrity of the RFID system, reducing the likelihood of unauthorized access and tampering, and ensuring that only authentic data is accepted.
Implementation Method 1
a subordinate chip (216) embedded in the credential and communicatively coupled to the primary chip through a capacitive or inductive coupling
Implementation Method 2
communicatively coupled to the primary chip through a capacitive or inductive coupling
Implementation Method 3
communicatively coupled to the primary chip through a capacitive or inductive coupling
Data Source
AI summary
A tamper-evident credential has a radio frequency identification (RFID) package with a first antenna and a subordinate antenna, RFID package defining a first part of the credential. The credential also has a subordinate RFID package defining a second part of the credential. The subordinate RFID package selectively coupled to said subordinate antenna so that an interrogation signal applied to said first antenna package is transmitted to the subordinate RFID package across said subordinate antenna.


