Dual-Chopper Amplifier Readout for Low-Noise Capacitive Sensors
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Solution Overview
Problem
Current readout circuits for micro-machined capacitive sensors with small sensing capacitance and low transducer sensitivity face challenges in achieving high dynamic range and low power dissipation due to high output impedance and significant 1/f noise, which limits their application in portable consumer electronics.
Innovation Solution
A two-stage dual-chopper amplifier with a mixed modulation clock and two demodulation clocks is used, along with low-pass filters to filter out circuit offset and noise, effectively reducing noise and power consumption while maintaining gain accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If high clock frequency is used to remove 1/f noise, then noise is reduced, but power dissipation increases
Solution Approach 1:
The readout circuit is divided into two stages: a first chopper stage operating at low frequency to remove dominant 1/f noise, and a second amplifier stage operating at high frequency to provide additional noise filtering. This segmentation allows each stage to operate at optimized frequencies, reducing the need for uniformly high clock frequencies throughout the circuit and thereby lowering overall power dissipation while maintaining effective noise suppression.
Solution Approach 2:
The chopper amplifier uses periodic modulation of the input signal at a low frequency to shift the signal spectrum away from the 1/f noise region. This periodic action allows the use of lower clock frequencies compared to continuous high-frequency operation, reducing power consumption while still achieving effective noise removal through correlated double sampling.
2Measurement precision
If large signal gain is provided to amplify small sensed signals, then sensitivity is improved, but bandwidth requirement increases
Solution Approach 1:
The amplification function is segmented into two stages: the first chopper amplifier provides moderate gain while removing 1/f noise, and the second amplifier provides additional gain at high frequency. This segmentation allows the total required gain to be distributed across stages with different bandwidth requirements, reducing the bandwidth demand on any single stage while achieving the overall sensitivity needed for small sensed signals.
3Volume of moving object
If small sensing capacitance is used in micro-machined sensors, then device size is reduced, but output impedance increases
Solution Approach 1:
The chopper amplifier acts as an intermediary between the small-sensing-capacitance sensor and the subsequent readout circuitry. By using periodic modulation and correlated double sampling, the chopper amplifier effectively isolates the high-impedance sensor from the low-impedance downstream circuitry, preventing impedance mismatch and signal loss while allowing the sensor to maintain its small size.
Data Source
AI summary
Low-noise, high-dynamic-range readout circuits with reduced power dissipation for capacitive sensors having small sensing capacitance and low transducer sensitivity are provided by combining a mixed modulation clock and a dual-chopper amplifier (DCA) circuit. The mixed modulation clock is generated by an exclusive-OR (XOR) of a high frequency clock and a low frequency clock. With the mixed modulation clock, an input signal is double-modulated by the high frequency clock and the low frequency clock, respectively. The DCA amplifies the input signal in two amplification stages. The first amplification stage amplifies the double-modulated signal and then demodulates the amplified signal by the high-frequency clock. Then, the second amplification stage amplifies the signal as a conventional chopper amplifier with the low-frequency clock as the chopping clock. Low pass filters following the two amplification stages filter out the modulated circuit offset and low-frequency flicker noise.