Dual Circuit Inversion Layout for Fault Attack Detection

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Solution Overview

Problem

The duplication approach in digital circuits is vulnerable to fault attacks, as attackers can exploit the similarity in layout between the original and duplicate circuits to inject undetectable errors by targeting identical positions in both, which are not easily detectable due to their identical implementation.

Innovation Solution

Implementing a dual circuit with inverted outputs and using input and output inverters, along with delay elements, to create a non-identical layout for the duplicate circuit, making it harder for attackers to inject errors undetectably by requiring inverted error injection and time-alignment challenges.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a duplicate circuit is used for error detection, then all errors in one circuit are detected, but the identical layout makes it vulnerable to fault attacks where the same error occurs in both circuits

Engineering Contradiction:
Improveerror detection capabilityVSAvoidvulnerability to fault attacks
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies asymmetry by using dual circuits with inverted logic instead of identical duplicate circuits. The dual circuit has inverted inputs and outputs compared to the original circuit, creating an asymmetric relationship. This asymmetry prevents attackers from easily identifying corresponding positions for fault injection, as the logical relationship between corresponding elements is inverted rather than identical.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent implements inversion by creating a dual circuit where inputs are inverted and outputs are inverted relative to the original circuit. This inversion principle transforms the vulnerability of identical circuits into a protective mechanism, where faults injected into one circuit will produce different erroneous outputs in the dual circuit, enabling detection while maintaining the benefits of duplication for error detection.

Inventive Principle:
Principle #13The other way round (Inversion)

2Device complexity

If the original and duplicate circuits are fully identical, then error detection is simplified, but attackers can easily identify locations to inject the same error in both circuits

Engineering Contradiction:
Improvecircuit configuration simplicityVSAvoiddifficulty of fault attack detection
Core Design Contradiction:
Device complexityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent uses asymmetry to transform the duplicate circuit from an identical copy into a dual circuit with inverted logic. This asymmetric configuration increases the difficulty of fault attack detection for attackers while maintaining manageable circuit complexity through systematic dualization of the original circuit design.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent changes the logical parameters of the duplicate circuit by inverting inputs and outputs. This parameter change transforms the circuit configuration from identical to dual, achieving enhanced security against fault attacks while maintaining a systematic and manageable increase in circuit complexity through well-defined parameter transformations.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11636227B2Protection against fault attacks by duplication
Publication Date: 2023.04.25 NXP BV
  • US11636227B2 patent drawing
  • US11636227B2 patent drawing
  • US11636227B2 patent drawing

AI summary

Various embodiments relate to a circuit system, including: an original circuit; a dual circuit, wherein the dual circuit is a dual of the original circuit; an input inverter connected the dual circuit, wherein the input inverter inverts system inputs; an output inverter connected to one of the original circuit and the dual circuit, wherein the output inverter inverts the output of the connected original circuit or dual circuit; and a comparator receiving and comparing the output of the invertor and the output of one of the original circuit and the dual circuit not connected to the inverter, wherein the comparator indicates an error when the received outputs are not identical and indicating no error when the received outputs are identical.