Dual-Clock Serial Interface Baud Correction for Low-Power Sync
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Solution Overview
Problem
Existing baud rate correction techniques in serial communication systems, particularly in LIN networks, do not adequately address the need for reducing power consumption while maintaining accurate synchronization and data capture.
Innovation Solution
A semiconductor device with a dual-clock system, utilizing a high-accuracy and low-power consumption clock, along with a control circuit to correct baud rates, includes a first and second baud rate generator to achieve precise data capture with reduced power usage by minimizing the operation of high-accuracy clocks during periods other than start bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a high-accuracy clock is continuously operated in slave nodes for baud rate correction, then measurement precision is improved, but power consumption increases
Solution Approach 1:
The patent implements periodic action by operating the high-accuracy clock only during specific correction periods rather than continuously. The control circuit activates the high-accuracy clock periodically to perform baud rate correction measurements, then deactivates it during normal operation, thereby maintaining measurement precision when needed while dramatically reducing overall power consumption in slave nodes.
Solution Approach 2:
The patent applies preliminary action by performing baud rate correction measurements in advance during dedicated correction periods before normal data transmission begins. The high-accuracy clock is activated beforehand to measure and correct the baud rate, ensuring accurate communication parameters are established prior to actual data exchange, thus preventing the need for continuous high-accuracy operation.
2Reliability
If baud rate correction is performed frequently to maintain synchronization accuracy, then reliability is improved, but loss of time increases due to repeated correction operations
Solution Approach 1:
The patent implements periodic action by scheduling baud rate correction operations at specific intervals rather than continuously or too frequently. The control circuit activates the high-accuracy clock during designated correction periods to perform measurements, then deactivates it during normal operation, thereby maintaining synchronization accuracy when needed while minimizing the time lost to correction operations.
Solution Approach 2:
The patent applies preliminary action by performing baud rate correction measurements in advance during dedicated correction periods before normal data transmission begins. This ensures synchronization accuracy is established beforehand, preventing communication errors without requiring frequent interruptions during actual data exchange, thus reducing overall time loss.
Data Source
AI summary
A semiconductor device includes a first clock; a second clock; a first baud rate generator generating the basic clock by using the first clock; a second baud rate generator generating the basic clock by using the second clock; and a control circuit correcting the first baud rate generator. The control circuit includes: a correction operation signal output circuit outputting a correction operation signal on the basis of the second clock of the second baud rate generator; and a correction value setting circuit outputting a correction value setting signal on the basis of the correction operation signal. The second baud rate generator counts a correction period in accordance with the correction operation signal by using the first clock on the basis of the correction value setting signal, and sets a baud rate correction value on the basis of a count result.