Dual Clock Domain Deskew Circuit for Signal Skew
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Solution Overview
Problem
In communication systems, data transmitted over multiple channels often experiences signal skew due to mismatches in channel length and impedance, which increases with higher computing frequencies, making traditional deskewing methods inefficient and power-intensive.
Innovation Solution
Implementing a dual clock domain deskew circuit that utilizes a combination of high-speed and low-speed clock domains to maintain deskew resolution while reducing power consumption and die area, by shifting some deskew stages to a slower clock domain for coarser deskew steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional deskewing methods are used to correct signal skew in multi-lane communications, then skew correction is achieved, but power consumption and die area increase significantly
Solution Approach 1:
The deskew circuit is segmented into two independent clock domains: a high-speed clock domain for fine-granularity deskew operations and a low-speed clock domain for coarse-granularity deskew operations. This segmentation allows the system to distribute deskew stages across different clock domains, reducing the power consumption and die area required while maintaining the necessary deskew resolution. The high-speed domain handles critical path deskew with high precision, while the low-speed domain handles less time-critical deskew with lower resource requirements.
2Measurement precision
If traditional deskewing methods are used to correct signal skew in multi-lane communications, then skew correction is achieved, but die area increases significantly
Solution Approach 1:
The deskew circuit is segmented into two independent clock domains: a high-speed clock domain for fine-granularity deskew operations and a low-speed clock domain for coarse-granularity deskew operations. This segmentation allows the system to distribute deskew stages across different clock domains, reducing the power consumption and die area required while maintaining the necessary deskew resolution. The high-speed domain handles critical path deskew with high precision, while the low-speed domain handles less time-critical deskew with lower resource requirements.
3Productivity
If higher computing frequencies are used to increase data transmission speed, then productivity increases, but signal skew between lanes increases
Solution Approach 1:
The system dynamically adapts to varying skew conditions by utilizing two clock domains with different frequencies. The high-speed clock domain provides fine-granularity deskew adjustment for critical timing alignment, while the low-speed clock domain provides coarse-granularity adjustment for overall synchronization. This dynamic multi-domain approach enables the system to maintain signal alignment precision even as data transmission speed increases and skew becomes more pronounced.
Data Source
AI summary
In general, in one aspect, the disclosure describes an apparatus including a first deskew unit and a second deskew unit. The first deskew unit operates at a first clock domain and provides fine timing adjustment to a signal. The second deskew unit operates at a second clock domain that is slower than the first clock domain and provide coarse timing adjustment to the signal.