Dual Clock Synchronization Control for Error Pattern Detection

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Solution Overview

Problem

Existing control systems in critical facilities like nuclear and wind power plants are vulnerable to clock synchronization errors and malicious attacks, leading to potential fatal consequences due to the use of dual clock synchronization mechanisms that fail to differentiate between transitory, interval-changing, and consecutive errors.

Innovation Solution

A control device with a dual clock synchronization mechanism that includes separate first and second clock synchronizers for NTP-based and contact signals, each with pattern analyzers and validity determiners to differentiate between transitory, interval-changing, and consecutive errors, allowing for adaptive clock synchronization and warning mechanisms.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a dual clock synchronization mechanism is used to improve clock synchronization reliability, then clock synchronization accuracy is improved, but the system becomes vulnerable to clock synchronization errors and malicious attacks

Engineering Contradiction:
Improveclock synchronization reliabilityVSAvoidvulnerability to clock synchronization errors and malicious attacks
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent divides the clock synchronization system into two independent synchronizers: a first clock synchronizer for contact signals and a second clock synchronizer for NTP signals. Each synchronizer operates separately with its own pattern analyzer and validity determiner, allowing independent analysis and validation of different synchronization sources to prevent single-point failures and malicious attacks

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements a feedback mechanism where pattern analyzers continuously monitor signal reception patterns and feed this information to validity determiners. The validity determiners use this feedback to identify transitory errors, interval-changing situations, and consecutive errors, then provide feedback to the controller to switch between synchronizers or alert operators, creating a closed-loop safety system

Inventive Principle:
Principle #23Feedback

2Ease of operation

If clock synchronization is performed without differentiating error types, then the system is simpler to operate, but serious control problems occur in dangerous facilities

Engineering Contradiction:
Improveclock synchronization operation simplicityVSAvoidcontrol system reliability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent implements self-service through automated pattern analysis and validity determination. The pattern analyzers automatically monitor signal patterns, the validity determiners automatically classify error types (transitory, interval-changing, consecutive), and the controller automatically switches between synchronizers or triggers alerts without requiring manual intervention, maintaining both simplicity and high reliability

Inventive Principle:
Principle #25Self-service

3Device complexity

If a single clock synchronizer is used to simplify the system structure, then device complexity is reduced, but the system cannot detect or handle different types of clock synchronization errors

Engineering Contradiction:
Improveclock synchronization system complexityVSAvoiderror detection capability
Core Design Contradiction:
Device complexityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent segments the clock synchronization function into two separate synchronizers, each with its own pattern analyzer and validity determiner. This segmentation allows specialized error detection for different signal types while maintaining manageable complexity through modular architecture where each component has a specific, well-defined function

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by implementing pattern analysis and validity determination at the signal processing stage rather than requiring complex system-wide monitoring. Each synchronizer performs only the necessary analysis for its specific signal type, avoiding excessive complexity while achieving comprehensive error detection

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12549270B2Control device for control system with dual clock synchronization mechanism
Publication Date: 2026.02.10 WOORI TECH CORP
  • US12549270B2 patent drawing
  • US12549270B2 patent drawing
  • US12549270B2 patent drawing

AI summary

Provided is a control device for a control system with a dual clock synchronization mechanism which detects a clock synchronization problem resulting from various circumstances of a site to analyze a situation related to the clock synchronization problem and warn of the situation. Therefore, it is possible to efficiently handle a clock synchronization problem resulting from various circumstances of a site.