Dual-Reference Clock Synchronization for Measurement Modules
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Solution Overview
Problem
Existing synchronization methods for signal processing modules in measurement systems are complex and costly, often requiring additional hardware components like directional couplers and receiver modules, and are not easily retrofittable to existing devices.
Innovation Solution
A synchronization method using two reference clock signals of different frequencies to determine intersections for precise synchronization of signal processing modules, eliminating the need for additional hardware and allowing software-based implementation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If additional directional couplers and receiver modules are used for synchronization, then synchronization precision is improved, but device complexity and manufacturing costs increase
Solution Approach 1:
The patent extracts the synchronization function from dedicated hardware components (directional couplers and additional receiver modules) and relocates it to the existing signal processing modules. Each signal processing module uses its own receiver module to capture both the reference clock signal and the input signal, eliminating the need for separate synchronization hardware while maintaining synchronization precision.
Solution Approach 2:
The patent makes the existing receiver modules multi-functional by enabling them to perform both signal reception for measurement purposes and synchronization function. The same receiver module that captures input signals for analysis also captures the reference clock signal, allowing a single component to serve dual purposes and eliminating redundant hardware.
2Measurement precision
If additional directional couplers and receiver modules are used for synchronization, then synchronization precision is improved, but manufacturing costs increase
Solution Approach 1:
The patent makes the existing receiver modules multi-functional by enabling them to perform both signal reception for measurement purposes and synchronization function. The same receiver module that captures input signals for analysis also captures the reference clock signal, allowing a single component to serve dual purposes and eliminating redundant hardware.
Solution Approach 2:
The patent merges the synchronization function with the existing signal processing functionality. By combining the reference clock signal reception and input signal reception into the same receiver module, the patent eliminates the need for separate synchronization hardware, thereby reducing component count and manufacturing costs.
3Reliability
If conventional synchronization methods are used, then synchronization capability is achieved, but retrofit implementation is difficult and requires high efforts
Solution Approach 1:
The patent makes the existing receiver modules multi-functional by enabling them to perform both signal reception for measurement purposes and synchronization function. The same receiver module that captures input signals for analysis also captures the reference clock signal, allowing a single component to serve dual purposes and eliminating redundant hardware.
Solution Approach 2:
The patent implements synchronization by having each signal processing module create a local copy of the reference clock signal through its own receiver module. This distributed approach allows each module to independently capture and process the reference signal, making the system highly adaptable to retrofit scenarios where modules can be individually upgraded without affecting others.
Data Source
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AI summary
A synchronization method of synchronizing at least two signal processing modules of a measurement system (10) is described. The at least two signal processing modules comprise a first signal processing module (32) and a second signal processing module (34) generating a first local clock count and a second local clock count, respectively. The synchronization method comprises the following steps: - receiving a low-reference clock signal having a low-reference frequency and a high-reference clock signal having a high-reference frequency; - determining a low-reference clock count of the low-reference clock signal and a high-reference clock count of the high-reference clock signal; - determining a first low-reference fit of the low-reference clock count against the first local clock count and a second low-reference fit of the low-reference clock count against the second local clock count; - determining a first high-reference fit of the high-reference clock count against the first local clock count and a second high-reference fit of the high-reference clock count against the second local clock count; - determining an intersection of the first low-reference fit and the first high-reference fit; - determining an intersection of the second low-reference fit and the second high-reference fit; and - synchronizing the first signal processing module (32) and the second signal processing module (34) based on the determined intersections. Further, a measurement system (10) is described.