Dual-Clock PWM Conversion Circuit for Precision and Stability
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Solution Overview
Problem
Current PWM signal generation circuits face challenges in precision and linearity, particularly in open-loop analog-only solutions, and digital circuit-based solutions introduce system instability and interference due to the need for analog-to-digital converters.
Innovation Solution
A dual clock signal to pulse-width modulated signal conversion circuit that inputs two clock signals, where the duty cycle of the PWM signal is equivalent to the ratio of the clock cycles, enabling high-precision output with dual analog and digital properties, suitable for analog-to-digital and digital-to-analog conversions, and featuring a pulse-width modulation circuit with counters and an edge reset circuit for logic processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If an analog-only circuit solution is used for PWM signal generation, then the circuit structure is simple, but the precision and linearity of the PWM signal are not satisfactory
Solution Approach 1:
The patent divides the PWM generation process into two independent clock signal inputs (first clock signal and second clock signal) that are processed separately through counters. The first counter processes the first clock signal to generate a first pulse signal, while the second counter processes the second clock signal to generate a second pulse signal. These segmented processing paths are then combined through logical operations to produce the final PWM signal, allowing each segment to maintain high precision while the overall structure remains manageable.
2Measurement precision
If a digital circuit-based logic value to PWM signal conversion solution is used, then the PWM precision and linearity are good, but the system stability deteriorates and anti-interference capability is reduced
Solution Approach 1:
The patent introduces two clock signals as intermediary elements that bridge the digital and analog domains. Instead of directly converting digital logic values to PWM signals through a microcontroller, the system uses clock signals with specific frequency ratios as intermediaries. The first clock signal and second clock signal serve as stable references that mediate the conversion process, improving anti-interference capability while maintaining precision through their deterministic phase relationships.
3Adaptability or versatility
If a microcontroller-based solution with analog-to-digital converter is used, then the PWM signal can be generated, but the system becomes more complex and performance deteriorates
Solution Approach 1:
The patent extracts and removes the microcontroller and analog-to-digital converter from the PWM generation system. By taking out these complex components, the invention achieves PWM signal generation through a simpler dedicated circuit architecture. The extraction of the microcontroller eliminates the need for complex software control and ADC operations, while the dedicated counter and logic gate circuitry provides a streamlined hardware-only solution that maintains versatility for both ADC and DAC applications.
Data Source
AI summary
Disclosed is a dual clock signal to pulse-width modulated signal conversion circuit, comprising: a first counter, an input end of which inputs a first clock signal, and an output end of which outputs a divided signal; an edge reset circuit, an input end of which inputs the divided signal, the output end of which outputs a first reset pulse signal and a second reset pulse signal, the first reset pulse signal being configured for resetting a second counter, and the second reset pulse signal being configured for resetting a third counter; a second counter, an input end of which inputs the second clock signal and the first reset pulse signal, and an output end of which outputs the first pulse-width modulated signal; a third counter, an input end of which inputs the second clock signal and the second reset pulse signal, and an output end of which outputs the second pulse-width modulated signal; a logic processing circuit, an input end of which inputs the first pulse-width modulated signal and the second pulse-width modulated signal, and an output end of which outputs a pulse-width modulated signal PWM_OUT. The disclosure offers high precision, system stability, and good anti-interference.