Dual-Clock Security Control for Precise Clock Error Detection

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Solution Overview

Problem

Current security control systems in automation technology face challenges in accurately detecting clock source errors, leading to inaccurate reaction times and potential uncontrolled system operation, as they rely on a single clock source for isochronous execution of security functions.

Innovation Solution

A security control system utilizing two separate controllers with independent clock generators, where one clock signal serves as a reference to detect frequency deviations, allowing for synchronous execution and precise error detection, enabling quick and accurate shutdowns when deviations exceed predetermined tolerance ranges.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single clock source is used for isochronous execution of security functions, then synchronous operation of controllers is achieved, but accurate detection of clock source errors becomes impossible

Engineering Contradiction:
Improvesynchronous operationVSAvoidclock error detection
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The system divides the clock source into two independent parts: a first clock generator in the first controller and a second clock generator in the second controller. Each controller has its own independent clock source, allowing them to operate synchronously while enabling mutual monitoring and detection of clock errors through comparison of the two independent clock signals.

Inventive Principle:
Principle #1Segmentation

2Reliability

If mutual monitoring of controllers is implemented to detect clock errors, then reliability is improved, but accurate measurement of reaction times becomes impossible

Engineering Contradiction:
Improveclock error detectionVSAvoidreaction time measurement
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

A common reference clock signal is introduced as an intermediary that is fed to both controllers simultaneously. This reference clock serves as a neutral timing基准 that both controllers use for measurement, enabling accurate reaction time measurement while maintaining the ability to detect clock errors through comparison with the reference signal.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If waiting times are introduced during execution of security loops, then thorough error checking is possible, but response time to errors is unnecessarily prolonged

Engineering Contradiction:
Improveerror detection accuracyVSAvoidresponse time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The system continuously monitors clock signals and compares them in real-time without introducing waiting times or idle periods in the security loop. The independent clock generators and continuous comparison mechanism enable error detection to occur continuously during normal operation, eliminating the need for deliberate waiting periods while maintaining thorough error checking.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS10969819B2Security control and method for operating a security control
Publication Date: 2021.04.06 WAGO VERW GMBH
  • US10969819B2 patent drawing
  • US10969819B2 patent drawing
  • US10969819B2 patent drawing

AI summary

The present invention relates to a security control comprising a first controller having a first clock generator for generating a first clock signal, a separate second controller having a second clock generator for generating a second clock signal, wherein the first clock signal is output to a first input of the first controller and to a first input of the second controller, and the second clock signal is output to a second input of the first controller and to a second input of the second controller. In addition, the present invention relates to a method for operating a security control.