Dual-Clock Shift Register for Bidirectional Latch Timing
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Solution Overview
Problem
Conventional shift registers are often unidirectional and sensitive to temperature and voltage variations, leading to errors in operation.
Innovation Solution
A shift register design utilizing master-slave latch arrangements controlled by dual non-overlapping clocks, where the clock generation circuit synchronizes and buffers clocks to generate intermediate clocks for bidirectional data shifting, reducing sensitivity to process, temperature, and voltage variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional shift registers use a single clock for all flip flops, then the circuit structure is simple, but the shift direction is unidirectional and the circuit is sensitive to temperature and voltage variations
Solution Approach 1:
The shift register is divided into multiple independent flip-flop chains (first chain, second chain, third chain), each capable of independent operation. This segmentation allows the register to shift data in multiple directions by selectively enabling different chains, resolving the unidirectional limitation while maintaining structural organization.
Solution Approach 2:
The patent implements dynamic clock control where different clock signals (first clock, second clock) are selectively applied to different flip-flop chains based on the desired shift direction. This dynamic switching of clock signals enables bidirectional shifting capability without permanently increasing circuit complexity.
2Device complexity
If conventional shift registers use a single clock, then the circuit is simpler, but hold time violations occur and errors happen under varying conditions
Solution Approach 1:
The patent uses periodic non-overlapping clock signals (first clock and second clock) that are generated with specific timing relationships. These periodic clocks ensure that master and slave latches are updated in a controlled sequence, preventing hold time violations and ensuring reliable operation under varying temperature and voltage conditions.
Solution Approach 2:
The patent introduces clock generation circuitry as an intermediary component that produces the first and second clocks from a reference clock signal. This intermediary circuit ensures proper timing and non-overlapping operation, isolating the flip-flop chains from direct timing conflicts and improving overall reliability.
3Reliability
If dual non-overlapping clocks are used to control master-slave latches, then bidirectional shifting and reliability are improved, but the clock generation circuit becomes more complex
Solution Approach 1:
The clock generation circuitry is designed to serve multiple functions: it generates non-overlapping clocks for bidirectional shifting, provides timing control for multiple flip-flop chains, and ensures proper synchronization across the entire shift register. This multi-functionality justifies the added complexity by consolidating multiple control functions into a single circuit block.
Data Source
AI summary
Disclosed herein is an electronic device including a flip flop and clock generation circuitry for controlling the flip flop. The flip flop includes a master latch receiving input for the flip flop, with the master latch latching the received input to its output in response to a first clock. The slave latch receives input from the output of the master latch, and latches the received input to its output in response to a second clock. The clock generation circuitry is configured to logically combine a device clock and an input clock to produce the first and second clocks.