Dual-Clock Serial Communication for Synchronized Slave Processing

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Solution Overview

Problem

Existing serial communication systems face synchronization issues due to the need for continuous clock signals for local functions, leading to degraded image quality in systems like LED displays, as multiple slave devices generate local clock signals independently.

Innovation Solution

A serial communication device and method that utilizes dual clock signals, where the communication clock is intermittent and the system clock is continuous, allowing the first-stage slave device to receive both and subsequent-stage devices to receive only the system clock, balancing clock requirements for serial communication control and local data processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Duration of action of stationary object

If multiple slave devices generate local clock signals independently, then local functions can operate continuously, but synchronization issues occur among the local clock signals degrading image quality

Engineering Contradiction:
Improvecontinuous clock signal for local functionsVSAvoidsynchronization among local clock signals
Core Design Contradiction:
Duration of action of stationary objectVSReliability

Solution Approach 1:

The patent merges the communication clock and system clock into a unified clock distribution architecture. The master device generates both clock signals, and slave devices receive them through a standardized interface, ensuring synchronization while providing continuous operation for local functions.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces a system clock as an intermediary signal that mediates between the intermittent communication clock and the continuous local function requirements. This system clock serves as a common reference for all slave devices, ensuring synchronization while enabling continuous operation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Use of energy by moving object

If an intermittent communication clock is used for data transmission, then power consumption is reduced during idle phases, but continuous clock signals are needed for local data processing functions

Engineering Contradiction:
Improvepower consumption during communicationVSAvoidclock signal availability for local functions
Core Design Contradiction:
Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

The patent segments the clock signal functionality into two distinct signals: communication clock for data transmission and system clock for local functions. This segmentation allows each clock to be optimized independently - the communication clock can be intermittent to save power, while the system clock remains continuous to support local functions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system clock serves multiple functions simultaneously - it acts as a reference clock for synchronization, provides continuous timing for local data processing, and enables complex functions in slave devices. This multi-functionality resolves the conflict between power saving and functional requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If dual clock signals are provided to all slave devices, then synchronization and continuous operation are achieved, but device complexity increases

Engineering Contradiction:
Improvetiming consistency and synchronizationVSAvoidclock circuit configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Instead of having each slave device generate its own clock signals or select between multiple sources, the patent inverts the approach by having the master device generate both clock signals and distribute them to all slave devices. This centralization reduces the complexity at the slave device level while maintaining synchronization and continuous operation.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS20260105021A1Serial communication device, serial communication system, and serial communication method
Publication Date: 2026.04.16 HANGZHOU SHIXIN TECH CO LTD
  • US20260105021A1 patent drawing
  • US20260105021A1 patent drawing
  • US20260105021A1 patent drawing

AI summary

Disclosed is a serial communication device, a serial communication system and a serial communication method. The serial communication device includes: a first shift register for receiving data based on a communication clock or a system clock; a second shift register for transmitting data based on the system clock; a data processing circuit for processing data based on the system clock. The serial communication device receives the communication clock and the system clock, the communication clock is a clock signal that is active during a serial communication phase and inactive during an idle phase, and the system clock is a clock signal that is continuously effective during both the serial communication phase and the idle phase. In the serial communication system, the serial communication device serves as a slave device, receiving data based on the communication clock or the system clock, and processing data based on the system clock.