Dual Clock Supply for Multiprocessor Reliability
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Solution Overview
Problem
Conventional clock supply methods in multiprocessor systems fail entirely if the clock source fails, leading to system downtime and potential data loss.
Innovation Solution
Implementing a dual clock supply system where one clock supply unit provides a primary clock to one group of processing units and a standby clock to another group, with the ability to switch to a secondary clock source if the primary clock fails, ensuring continuous operation by distributing clocks with the same frequency across different partitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single clock source is used to supply clocks to all processing units, then the device complexity is reduced, but the reliability of the system deteriorates because a failure of the clock source results in a failure of the entire system
Solution Approach 1:
The system divides processing units into multiple groups (first group and second group) and assigns different clock sources to each group. The first clock source supplies clocks to the first group, while the second clock source supplies clocks to the second group. This segmentation isolates clock supply failures to specific groups rather than affecting the entire system, thereby improving reliability while maintaining manageable complexity.
Solution Approach 2:
The patent introduces a switching mechanism that changes the operational state of clock sources based on detected abnormalities. When an abnormality is detected in the clock source for a particular group, the system switches from the primary clock source to a standby clock source for that group. This dynamic parameter change (operational state) ensures continuous operation and improves system reliability.
2Reliability
If a standby clock source is provided for each processing unit group, then the reliability is improved, but the device complexity increases due to multiple clock sources and switching mechanisms
Solution Approach 1:
The patent implements a universal clock supply architecture where each clock source can serve multiple functions: it can be a primary clock source for one group and a standby clock source for another group. This multi-functionality reduces the total number of dedicated clock sources needed, thereby limiting the increase in device complexity while maintaining high reliability through redundancy.
Solution Approach 2:
The switching mechanism acts as an intermediary between clock sources and processing unit groups. It manages the complexity of clock supply by providing a centralized control point that routes clocks from appropriate sources to appropriate groups, abstracting the complexity away from the processing units themselves and making the system more manageable.
3Reliability
If the clock supply system is designed with multiple independent clock sources, then the reliability is improved by allowing partition takeover, but the probability of entire system failure increases if partitions fail simultaneously due to a common clock source failure
Solution Approach 1:
The patent segments the system into distinct clock supply domains by assigning different clock sources to different processing unit groups. This segmentation prevents a single clock source failure from affecting the entire system, as each group has its own primary clock source. The segmentation isolates failures to specific groups, eliminating the common mode failure risk while preserving partition failover capabilities within each group.
Data Source
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AI summary
A clock supply method for supplying a clock to a plurality of processing units (13-1 to 13-4) includes supplying a clock from a first clock supply unit (12-1) to processing units (13-1, 13-2) forming a first group as a primary clock and to processing units (13-3, 13-4) forming a second group as a standby clock; supplying a clock from a second clock supply unit (12-2) including a clock source different from that of the first clock supply unit (12-1) to the processing units (13-3, 13-4) forming the second group as a primary clock and to the processing units (13-1, 13-2) forming the first group as a standby clock; and when a processing unit in the first or second group detects an abnormality of the primary clock, switching the standby clock into use in place of the primary clock being supplied to group to which the processing unit that has detected the abnormality belongs; wherein the first and second clock supply units (12-1, 12-2) supply clocks with the same frequency.