Dual Control LED Driver Ripple Reduction

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Solution Overview

Problem

Conventional LED drivers experience ripple voltage issues due to incomplete switching cycles, leading to unstable performance and audible noise, especially when the duty cycle of the current sink's PWM signal is low, causing insufficient time for the SMPS to transition between active and inactive modes.

Innovation Solution

The control logic determines the active time portion of the second control signal and adjusts the number of switching cycles of the first control signal to extend the active mode of the SMPS beyond the turn-off point of the current sink, ensuring sufficient time for stable voltage regulation and reducing ripple voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the duty cycle of the current sink's PWM signal is low to control LED brightness, then power consumption is reduced, but the SMPS does not have sufficient time to transition between active and inactive modes, causing ripple voltage and unstable performance

Engineering Contradiction:
Improvepower consumptionVSAvoidvoltage stability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The control logic extends the active mode of the SMPS beyond the turn-off point of the current sink by adjusting the number of switching cycles. This preliminary extension ensures that the SMPS has sufficient time to complete its transitions between active and inactive modes, allowing the output voltage to stabilize before the next PWM cycle begins, thereby preventing ripple voltage while maintaining low power consumption during dimming conditions

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system dynamically adjusts the number of switching cycles of the SMPS based on the duty cycle of the PWM signal. When the PWM duty cycle is low, the control logic increases the number of switching cycles to ensure adequate transition time. This dynamic adaptation allows the system to maintain voltage stability across varying brightness levels without wasting energy during low-power operation

Inventive Principle:
Principle #15Dynamics

2Loss of time

If the SMPS switching cycles are reduced to save time and energy, then efficiency is improved, but ripple voltage increases and audible noise is generated

Engineering Contradiction:
Improveswitching cycle timeVSAvoidripple voltage and audible noise
Core Design Contradiction:
Loss of timeVSObject-generated harmful factors

Solution Approach 1:

The control logic monitors the duty cycle of the PWM signal and uses this feedback to determine the appropriate number of switching cycles for the SMPS. When the PWM duty cycle indicates low power consumption conditions, the control logic automatically extends the SMPS switching cycles to ensure complete transitions. This feedback mechanism prevents ripple voltage and audible noise without requiring continuous high-frequency switching, thereby optimizing both time efficiency and output quality

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP3213602B1Dual control LED driver
Publication Date: 2020.05.27 TEXAS INSTRUMENTS INC
  • EP3213602B1 patent drawingFigure 1
  • EP3213602B1 patent drawingFigure 2A
  • EP3213602B1 patent drawingFigure 2B

AI summary

A light emitting diode (LED) driver includes a first switch (S1) to receive an input voltage (Vin) from an input voltage source and coupled to an output voltage node, a second switch (S2) coupled to the plurality of LEDs (102), and a control logic (106) coupled to the first and second switches. The first switch (S1) is configured to switch on and off so as to regulate a voltage level at the output voltage node, wherein the voltage level at the output voltage node is to power a plurality of LEDs (102). The second switch (S2) is configured to switch on and off so as to vary a brightness of the plurality of LEDs (102). Further, based on an external signal, the control logic (106) is configured to control first and second control signals to switch on and off the first and second switches, respectively. Still further, based on an active time portion of the external signal, the control logic (106) concurrently determines an active time portion of the second control signal and a number of switching cycles of the first control signal to switch on and off the first switch (S1).