Dual Conversion Gain Image Sensor Readout Circuit Memory Storage
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Solution Overview
Problem
Dual conversion gain image sensors require significant semiconductor die area for readout circuitry and memory storage structures, consuming large layout areas and power due to the need for separate circuit components to handle high and low gain pixel data.
Innovation Solution
Implementing readout circuits with a single counter and single data transmitter, along with a memory storage structure that uses static random access memories and multiplexors to read out both high and low gain pixel data, reducing the layout area and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate circuit components are used to handle high and low gain pixel data, then the readout circuit can fully process dual conversion gain data, but the layout area and semiconductor die size increase significantly
Solution Approach 1:
The patent combines separate readout circuits for high gain and low gain pixel data into a single integrated readout circuit. This unified circuit uses shared components including a single counter, single data transmitter, and multiplexed memory storage structures, thereby reducing the overall layout area while maintaining full dual conversion gain processing capability
Solution Approach 2:
The readout circuit is designed with universal components that can handle both high gain and low gain data. The single counter and data transmitter serve dual purposes for processing different gain modes, and the memory storage structure uses multiplexing to store and retrieve both types of data, eliminating the need for separate dedicated circuits
2Adaptability or versatility
If separate circuit components are used to handle high and low gain pixel data, then the readout circuit can fully process dual conversion gain data, but power consumption increases
Solution Approach 1:
By merging separate readout circuits into a single integrated circuit, the patent reduces the total number of active components that consume power. The unified counter, data transmitter, and memory storage structure eliminate redundant power consumption while maintaining full processing capability for both high and low gain data
3Adaptability or versatility
If multiple separate readout circuits are used for high and low gain data, then complete data processing is achieved, but the semiconductor die size increases
Solution Approach 1:
The patent merges multiple separate readout circuits into a single compact integrated circuit that processes both high and low gain data. This consolidation reduces the overall semiconductor die size by eliminating redundant components while maintaining complete data processing functionality through shared counters, data transmitters, and multiplexed memory structures
Data Source
AI summary
A readout circuit includes a comparator coupled to receive a ramp signal an output of a dual conversion gain pixel. A single counter is coupled to the output of the comparator. The counter is coupled to write to only one of a first or a second memory circuits at a time. A first multiplexor is coupled to load either an initial value or an initial memory value from the first memory circuit into the counter. A second multiplexor is coupled to load either a low conversion gain memory value from the first memory circuit or a high conversion gain memory value from the second memory circuit into a single data transmitter, which is coupled to transmit the received memory value to a digital processor.