Dual Core Engine Control Module Architecture

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Solution Overview

Problem

Existing vehicle safety-critical control systems are vulnerable to corrupted control signals due to failures in primary processors and components like RAM and ROM, which conventional fault detection methods often rely on shared ALUs, leading to potential incorrect system actions.

Innovation Solution

A control system with two independent IC cores, each generating control signals using distinct ALUs, allowing for parallel processing and comparison to detect and correct signal discrepancies, eliminating the need for a secondary processor and dual storage for error detection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a secondary processor is used for fault detection, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improvefault detection capabilityVSAvoidprocessor architecture
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the fault detection functionality into the primary processor by implementing a dual-core architecture where both cores share the same ALU resource. This eliminates the need for a separate secondary processor while maintaining fault detection capabilities through parallel signal generation and comparison.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The ALU is designed to be universally shared between both IC cores for signal generation and also serves as a shared resource for fault detection operations. This multi-functionality reduces overall device complexity while maintaining reliability through the redundant core architecture.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If dual storage is used for error detection, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveerror detection capabilityVSAvoidmemory architecture
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the error detection function from the storage architecture and relocates it to the processing architecture. By using the shared ALU and control logic to detect errors in signals from both cores, the system eliminates the need for dual storage implementations while maintaining error detection capability.

Inventive Principle:
Principle #2Taking out (Extraction)

3Device complexity

If shared ALU is used by multiple data paths, then device complexity is reduced, but reliability deteriorates due to potential signal corruption

Engineering Contradiction:
Improveprocessor architectureVSAvoidcontrol signal integrity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent segments the control signal generation into two independent paths through dual IC cores, each with its own control logic and registers. Although the ALU is shared, the segmentation of control paths allows for parallel operation and comparison, maintaining signal integrity through redundancy rather than through exclusive ALU access.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system implements feedback through comparison logic that monitors signals from both IC cores. When discrepancies are detected in the shared ALU outputs, the system can identify and correct errors, thereby maintaining reliability despite the shared resource architecture.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9207661B2Dual core architecture of a control module of an engine
Publication Date: 2015.12.08 GM GLOBAL TECHNOLOGY OPERATIONS LLC
  • US9207661B2 patent drawing
  • US9207661B2 patent drawing
  • US9207661B2 patent drawing

AI summary

A control system for a control module of a vehicle includes a first integrated circuit (IC) core of a primary processor that generates a first control signal using a central processing unit (CPU). A second IC core of the primary processor generates a second control signal using a second CPU and generates a remedial control signal based on the first control signal and the second control signal.