Dual-Core Embedded Device Hibernation Control
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Solution Overview
Problem
Embedded devices face challenges in conserving battery power due to limited resources and higher energy consumption, particularly in displaying content and processing capabilities, which affects their operational duration and efficiency.
Innovation Solution
Implementing a dual-processing core system where a less capable processing core controls a more capable core to enter a hibernation state, reducing power consumption by setting the clock frequency and memory refresh rate to zero, and using different memory technologies to optimize power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a more capable processing core is used to provide richer processing capabilities and display control, then processing performance and user experience are improved, but power consumption increases
Solution Approach 1:
The system dynamically transitions the second processing core between active and hibernation states based on operational needs. The first processing core monitors system state and triggers hibernation when full processing capability is not required, allowing the more capable core to consume less power while maintaining availability when needed.
Solution Approach 2:
The system changes the operational parameters of the second processing core by setting clock frequency and memory refresh rate to zero during hibernation state. This parameter change dramatically reduces power consumption while preserving the core's capability to resume full operation when activated by the first processing core.
2Ease of operation
If the processing core remains in active state to respond quickly to user interactions, then responsiveness is improved, but battery life decreases
Solution Approach 1:
The first processing core is designed to quickly activate the second processing core from hibernation state when user interactions or notifications are detected. This preliminary setup ensures that while the second core sleeps to conserve battery, it can be rapidly awakened to maintain system responsiveness when needed.
Solution Approach 2:
The system implements periodic monitoring by the first processing core to detect user interactions and notifications. This periodic activity allows the system to maintain battery efficiency during idle periods while ensuring timely response when the second processing core needs to be activated from hibernation.
3Use of energy by moving object
If clock frequency and memory refresh rate are set to zero to minimize power consumption, then energy efficiency is improved, but processing speed decreases
Solution Approach 1:
The system segments processing tasks between two cores: the first processing core handles low-power monitoring and control functions, while the second more capable core handles intensive processing tasks only when activated. This segmentation allows the system to maintain energy efficiency while preserving processing speed capability when needed.
Solution Approach 2:
The first processing core acts as an intermediary that manages the hibernation state of the second core. It monitors for activation conditions and triggers the second core's activation, thereby mediating between the low-power state and the high-performance state without requiring the second core to continuously operate at full speed.
Data Source
AI summary
According to an example aspect of the present invention, there is provided an apparatus comprising a first processing core configured to generate first control signals and to control a display by providing the first control signals to the display via a first display interface, a second processing core configured to generate second control signals and to control the display by providing the second control signals to the display via a second display interface, and the first processing core being further configured to cause the second processing core to enter and leave a hibernation state based at least partly on a determination, by the first processing core, concerning an instruction from outside the apparatus.