Dual-Core VCO Transformer Structure for Low Phase Noise
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Solution Overview
Problem
Rising sampling rates in data converters exceed 10 GS/s, causing challenges in managing clock jitter and limiting signal-to-noise ratio (SNR) performance, especially in high-speed applications like 5G/6G base stations, due to increased phase noise and thermal noise in single-turn inductors at frequencies above 10 GHz.
Innovation Solution
Implementing a dual-core transformer structure with a split planar loop geometry, reducing effective inductance by a factor of four while maintaining impedance, and incorporating a tunable common-mode resonance to improve phase noise performance and thermal noise reduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a single-turn inductor is used in a VCO at frequencies above 10 GHz, then the VCO can operate at high frequencies, but the phase noise and thermal noise increase significantly
Solution Approach 1:
The patent divides a single inductor into multiple inductors (e.g., four inductors) connected in parallel. Each inductor has fewer turns, which reduces the noise generated by each individual inductor. The parallel connection maintains the required total inductance value while achieving lower overall phase noise and thermal noise, thus resolving the contradiction between high-frequency operation and noise reduction.
2Object-generated harmful factors
If the inductance is reduced to lower phase noise, then the phase noise performance improves, but the impedance changes and may fall outside acceptable thresholds
Solution Approach 1:
The patent combines multiple inductors in parallel to achieve the desired effective inductance. By merging several low-inductance inductors, the system maintains the required impedance characteristics while each individual inductor generates less noise. This merging approach allows the VCO to achieve low phase noise without compromising impedance matching, thus resolving the contradiction between noise reduction and reliability.
3Object-generated harmful factors
If multiple inductors are used in parallel to reduce noise, then the phase noise and thermal noise decrease, but the device complexity increases
Solution Approach 1:
The patent designs the multiple inductors to be identical or similar in structure, allowing them to serve the same function simultaneously. This universal design simplifies the overall device complexity because the same inductor unit can be replicated multiple times, reducing design and manufacturing complexity despite using multiple inductors. The multi-functional approach allows the system to achieve noise reduction without proportionally increasing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dual-core transformer structure achieves a 6 dB improvement in phase noise performance and a 3 dB improvement in thermal noise, enhancing the figure of merit (FoM) and reducing power consumption, while maintaining signal integrity and efficiency in high-frequency operations.
Implementation Method 1
The first half of the transformer structure can be configured to magnetically couple with the second half of the transformer structure to synchronize the first signal with the second signal
Data Source
Figure 1A
Figure 1B
Figure 2A
AI summary
The disclosure describes systems and methods for implementing a dual-core voltage-controlled oscillator (VCO) (100). The dual-core VCO (100) can include a transformer structure (106) with the geometry of a planar circle. The transformer structure (106) can be divided into a first half (108) and a second half (110). Each half of the transformer structure (106) can include a first end (112) and a second end (114). The dual-core VCO (100) can include a first core (102) and a second core (104). The first core (102) can be coupled with the first end (112) of the first half (108) and the first end (112) of the second half (110). The second core (104) can be coupled with the second end (114) of the first half (108) and the second end (114) of the second half (110). The transformer structure (106) can be configured to reduce an effective inductance of the dual-core VCO (100) by a first threshold while maintaining impedance within a second threshold.