Dual-CPU Activation Program Falsification Verification
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Solution Overview
Problem
Existing information processing systems face challenges in cost-effectively performing error notifications when activation program falsification is detected, leading to user uncertainty and potential misuse during recovery processes.
Innovation Solution
An information processing apparatus comprising a first CPU for executing programs, a second CPU for verifying activation program falsification and performing recovery, a memory for storing boot codes, a switching unit for accessing memory, and a notification unit with multiple patterns, allowing the second CPU to control notification patterns based on falsification verification and recovery status.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If error notification is performed by the sub CPU using display control hardware, then error notification can be conveyed to the user, but the cost increases due to requiring two display control functions
Solution Approach 1:
The operation part's display control hardware is designed to serve multiple purposes: normal display operations during system operation and error notification during recovery processes. By making the display control hardware universal, the system eliminates the need for separate notification hardware while maintaining both functions.
Solution Approach 2:
The patent combines the error notification function with the existing display control hardware by having the operation part share the display control resources with the main CPU. This merging approach allows the sub CPU to utilize the same hardware infrastructure for notification purposes without requiring dedicated separate display control functions.
2Reliability
If overwriting is performed to restore the activation program, then system security is restored, but the main CPU activation stops during the overwriting time
Solution Approach 1:
The system performs preliminary verification of the activation program before full operation begins. By detecting falsification early in the boot process and initiating recovery procedures before the main CPU fully activates, the system minimizes the impact on overall system productivity while ensuring security restoration.
Solution Approach 2:
The operation part serves as an intermediary between the sub CPU's security verification functions and the main CPU's execution functions. During recovery processes, the operation part can display status information and coordinate the recovery operation, allowing security restoration to proceed without completely blocking main CPU activation.
Data Source
AI summary
An information processing apparatus that can perform error notification with ease and at a low cost in a case where falsification of an activation program is detected. The information processing apparatus has a main CPU for executing various programs, a sub CPU for verifying falsification of the activation program of the main CPU and perform recovery processing for the falsification, a FLASH Memory for storing a boot code of the activation program, a hardware sequencer for selectively switching one of the main CPU and the sub CPU so as to be capable of accessing the FLASH Memory, and a LED having three types of notification patterns. The hardware sequencer causes notification of the LED to change one of the three types of notification patterns according to both states of a falsification detection determination signal and an UNDER_RECOVERY signal from the sub CPU.