Dual CPU Embedded Flash Memory Access Conflict Resolution
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Solution Overview
Problem
Existing systems embedding flash memory, such as moviNAND, face challenges in booting and data access, particularly in dual core systems where conflicts arise when multiple processors attempt to access nonvolatile memory simultaneously, and lack efficient mechanisms for direct flash memory access.
Innovation Solution
A system architecture that includes a CPU, nonvolatile memory, a card slave controller, a card host controller, and a memory controller, utilizing distinct access paths and transmission gates controlled by the CPU to manage boot operations and normal data access, preventing conflicts between CPU cores and enabling direct access to nonvolatile memory using NAND and MMC interface protocols.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple CPU cores access nonvolatile memory simultaneously in a dual core system, then data access capability is improved, but access conflicts and system reliability deteriorate
Solution Approach 1:
A state machine is introduced as an intermediary component between multiple CPU cores and the nonvolatile memory. The state machine manages access requests from different CPU cores, arbitrates conflicts, and coordinates memory access operations to prevent simultaneous access conflicts while maintaining high data access capability.
Solution Approach 2:
The system dynamically switches between different access modes (single core access, dual core access, boot mode, normal mode) based on system state and requirements. This dynamic adaptability allows the system to optimize for either speed or conflict prevention depending on operational context.
2Device complexity
If a unified access path is used for boot and normal operations, then device complexity is reduced, but access efficiency and reliability deteriorate
Solution Approach 1:
The access path is segmented into distinct pathways: a first access path dedicated to boot operations and a second access path for normal operations. This segmentation allows each path to be optimized for its specific function, improving overall access efficiency while maintaining manageable system complexity through modular design.
3Ease of operation
If card host controller is used for all nonvolatile memory access, then ease of operation is improved, but access speed and productivity deteriorate
Solution Approach 1:
Memory access functionality is segmented between the card host controller (for MMC interface operations) and a dedicated memory controller (for high-speed NAND access). This segmentation allows the system to use the appropriate controller for each operation type, maintaining ease of operation through standardized interfaces while achieving high access speeds when needed.
Solution Approach 2:
The card slave controller acts as an intermediary that bridges the MMC interface protocol and the NAND flash memory interface. It translates and coordinates between different protocols, allowing the card host controller to maintain ease of operation while enabling efficient memory access through the dedicated memory controller.
Data Source
AI summary
An embedded memory card system includes a first CPU, a second CPU, a nonvolatile memory storing data, and a device busy state machine selecting one of the first CPU and the second CPU to access the nonvolatile memory. The nonvolatile memory is accessed by the one of the first CPU and the second CPU selected by the device busy state machine.