Dual-CPU PLC Fallback Control for Power Drop Abnormalities

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing control systems, such as those described in Patent Literatures 1 to 3, fail to allow selection between stopping and continuing the entire operation when an abnormality occurs, particularly when the CPU of a PLC or a controller has an abnormality.

Innovation Solution

A programmable logic controller (PLC) is designed with two independent central processing units (CPUs) and a selector to choose whether to stop or continue the operation of the second CPU when a voltage drop is detected in the internal power supply of the first CPU. This allows the PLC to select between a stop mode and a fallback mode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the PLC uses a single CPU for control operations, then the device complexity is reduced, but the reliability deteriorates because when the CPU has an abnormality, the devices cannot continue operating

Engineering Contradiction:
Improvesystem reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The control system is segmented into multiple independent CPUs (first CPU and second CPU) that can operate autonomously. Each CPU has its own power supply monitoring circuit, allowing independent detection and response to abnormalities. This segmentation enables the system to isolate failures to individual CPUs while maintaining overall system operation through the remaining functional CPUs.

Inventive Principle:
Principle #1Segmentation

2Productivity

If the system automatically stops all operations when an abnormality is detected, then the safety is improved, but the productivity deteriorates because the entire system stops even when some components are functioning normally

Engineering Contradiction:
ImproveproductivityVSAvoidsafety risk
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The system dynamically adjusts its operational state based on the detected abnormality conditions. When a voltage drop is detected in one CPU's power supply, the system can selectively stop only the affected CPU while allowing other CPUs to continue operation. This dynamic response enables the system to maintain productivity by keeping functional components operational while isolating and stopping only the problematic segments.

Inventive Principle:
Principle #15Dynamics

3Reliability

If the power supply monitoring IC outputs a reset signal to all controllers when voltage drops, then the reliability is improved by preventing unstable operation, but the productivity deteriorates because all controllers stop including those without abnormalities

Engineering Contradiction:
Improveoperational reliabilityVSAvoidsystem productivity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

Each CPU has its own dedicated power supply monitoring IC that independently monitors its specific power supply voltage. When a voltage drop is detected, the monitoring IC generates a reset signal that is confined to and affects only the specific CPU whose power supply experienced the drop. This localized quality approach ensures that reliability protection is applied precisely where needed without causing unnecessary shutdowns of other functional components.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250060734A1Programmable logic controller, central processing unit, and recording medium
Publication Date: 2025.02.20 MITSUBISHI ELECTRIC CORP
  • US20250060734A1 patent drawing
  • US20250060734A1 patent drawing
  • US20250060734A1 patent drawing

AI summary

Central processing units can perform factory automation control independently of each other. A first output selector selects to stop or not to stop an operation of a second central processing unit when a voltage drop in an internal power supply in a first central processing unit is detected. A first reset signal output controller stops the operation of the second central processing unit when the first output selector selects to stop the operation of the second central processing unit, and does not stop the operation of the second central processing unit when the first output selector selects not to stop the operation of the second central processing unit.