Dual-DAC Calibration Using Inverse Patterns for Timing Error Reduction
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Solution Overview
Problem
Digital to analog converter (DAC) devices face challenges in simultaneously eliminating amplitude and timing errors, particularly in applications with inductive loads, where complex circuit architectures and increased circuit area are required for calibration.
Innovation Solution
A DAC device with dual DAC circuits and a calibration circuitry that uses DC imbalanced input patterns and averaging operations to generate control signals, allowing for the calibration of circuit offsets and reduction of amplitude and timing errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a complex calibration circuit architecture is used to eliminate amplitude and timing errors, then the calibration precision is improved, but the device complexity and circuit area increase
Solution Approach 1:
The calibration process is segmented into two distinct phases: amplitude calibration using DC-balanced input patterns, and timing calibration using DC-imbalanced input patterns. This segmentation allows each calibration type to be performed independently with optimized circuit configurations, avoiding the need for a single complex calibration circuit that must handle both types simultaneously.
Solution Approach 2:
The calibration circuit operates periodically by alternating between DC-balanced input patterns for amplitude calibration and DC-imbalanced input patterns for timing calibration. This periodic action enables the same calibration circuit to perform different calibration functions at different time intervals, reducing the need for additional dedicated circuits for each calibration type.
2Measurement precision
If additional calibration circuits are added to eliminate both amplitude and timing errors, then the calibration precision is improved, but the circuit area increases
Solution Approach 1:
The calibration circuit is designed with multi-functionality to perform both amplitude calibration and timing calibration using the same hardware resources. By accepting different types of input patterns (DC-balanced and DC-imbalanced), the single calibration circuit can execute multiple calibration functions, eliminating the need for separate dedicated circuits for each calibration type and thereby reducing overall circuit area.
3Measurement precision
If DC-balanced input patterns are used for calibration, then amplitude calibration is achieved, but timing errors cannot be eliminated
Solution Approach 1:
The calibration system dynamically adapts its operation based on the type of input pattern received. When DC-balanced input patterns are detected, the circuit performs amplitude calibration; when DC-imbalanced input patterns are detected, it switches to timing calibration mode. This dynamic behavior allows the same circuit to optimize its calibration function according to the characteristics of the input signal, achieving both amplitude and timing error elimination.
4Measurement precision
If DC-imbalanced input patterns are used for calibration, then timing calibration is achieved, but amplitude errors cannot be eliminated
Solution Approach 1:
The calibration system maintains continuous calibration effectiveness by sequentially applying both DC-balanced and DC-imbalanced input patterns. The amplitude calibration phase ensures accurate amplitude performance, followed by the timing calibration phase that refines timing accuracy. This continuous calibration process, without interruption or gap in functionality, ensures both amplitude and timing errors are eliminated through the combination of both input pattern types.
Data Source
AI summary
A digital-to-analog converter (DAC) device includes a DAC circuitry and a calibration circuitry. The DAC circuitry includes first and second DAC circuits which generate first and second signals according to an input pattern. The input pattern includes at least one of first logic value and at least one of second logic value that have different numbers. The calibration circuitry performs a calibration operation according to first and second comparison results, to generate a control signal for controlling the second DAC circuit. The first comparison results are comparison results of the first and the second signals when the input pattern is a first pattern, the second comparison results are comparison results of the first and the second signals when the input pattern is a second pattern, and the first pattern is inverse to the second pattern.