Dual Damascene Crossbar Array Defect Disabling via Electromigration

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Solution Overview

Problem

In RRAM crossbar arrays, defective devices can cause severe current draw, leading to power supply damage and computation failure due to over-forming, which existing technologies fail to effectively address by disabling the faulty devices without affecting the rest of the array.

Innovation Solution

A dual damascene crossbar array structure is configured to disable defective devices by leveraging electromigration properties, where a high current is passed through the faulty device to form a void in the connection, thereby disabling it while maintaining the operation of the remaining devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a high current is passed through a faulty memory device to form a void and disable it, then the defective device is successfully disabled, but the device complexity increases due to the dual damascene structure

Engineering Contradiction:
Improvearray operation reliabilityVSAvoidcrossbar array structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The connection between the top electrode layer and bottom electrode layer is segmented into two separate conductive paths: a first via and a second via, forming a dual damascene structure. This segmentation allows independent control and disabling of individual memory devices by creating voids in specific vias, thereby improving array reliability while managing device complexity through modular disconnection points.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If existing technologies are used to address defective devices, then the array structure remains simple, but the power supply is damaged and computation fails due to severe current draw from defective devices

Engineering Contradiction:
Improvecrossbar array structure complexityVSAvoidarray operation reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The harmful electrical connection path through defective memory devices is extracted and removed by forming voids in the dual damascene via structures. This extraction eliminates the severe current draw from defective devices that would otherwise damage the power supply and cause computation failure, while maintaining the overall array structure.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The high current that would normally cause harm by damaging the power supply is converted into a beneficial tool by deliberately passing it through the dual damascene via structure to form controlled voids. This transforms the harmful current into a means of disabling defective devices and protecting the array, turning a potential failure mode into a reliability enhancement mechanism.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively disables defective devices in the array by inducing voids through electromigration, preventing damage to the power supply and ensuring stable operation of the rest of the crossbar array.

Implementation Method 1

A dual damascene crossbar array structure is configured to disable defective devices by leveraging electromigration properties, where a high current is passed through the faulty device to form a void in the connection

Methodology Applied
Scientific EffectElectromigration:

Data Source

PatentUS11682471B2Dual damascene crossbar array for disabling a defective resistive switching device in the array
Publication Date: 2023.06.20 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11682471B2 patent drawing
  • US11682471B2 patent drawing
  • US11682471B2 patent drawing

AI summary

Provided are embodiments for method of fabricating a dual damascene crossbar array. The method includes forming a bottom electrode layer on a substrate and forming a first memory device on the bottom electrode layer. The method also includes forming a dual damascene structure on the first memory device, wherein the dual damascene structure includes a top electrode layer and a first via, wherein the first via is formed between the first memory device and the top electrode layer. Also provided are embodiments for the dual damascene crossbar and embodiments for disabling memory devices of the dual damascene crossbar array.