Dual Damascene Structure Double Patterning Method
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Solution Overview
Problem
Conventional lithography processes face challenges in miniaturization and pattern accuracy due to limitations in printability and manufacturability, particularly at the 32 nanometer and 22 nanometer nodes, where the double patterning technique is needed to enhance resolution and maintain pattern integrity.
Innovation Solution
A manufacturing method for a dual damascene structure that employs a double patterning process to form staggered trench and via openings, using different etching rates for various mask layers and cap layers to ensure accurate transfer of patterns to the dielectric layer, thereby avoiding pattern failures and maintaining minimal space between openings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional lithography process is used, then manufacturing simplicity is maintained, but pattern accuracy and resolution are insufficient at 32nm and 22nm nodes
Solution Approach 1:
The patent applies segmentation by dividing the single lithography step into multiple patterning steps (double patterning process). The first lithography step forms initial patterns, and the second lithography step forms additional patterns that are combined to create the final high-resolution dual damascene structure. This segmentation enables achievement of 32nm and 22nm node resolution requirements that cannot be met by conventional single-step lithography.
2Area of moving object
If minimum space between adjacent openings is reduced, then device density is improved, but pattern failure such as trench openings connecting and via openings connecting occurs
Solution Approach 1:
The patent applies preliminary action by forming the first set of patterns (trench openings or via openings) through the first lithography step before forming the second set of patterns. The first patterns serve as a preliminary structure that guides the formation of the second patterns, ensuring that the minimum space between adjacent openings is maintained throughout the process. This sequential approach prevents pattern failure such as unintended connecting between adjacent openings while achieving high device density.
3Manufacturing precision
If double patterning process is used, then resolution is increased by up to two times, but process complexity and manufacturing difficulty increase
Solution Approach 1:
The patent applies the nested doll principle by forming patterns within patterns through the double patterning process. The first lithography step creates initial patterns, and the second lithography step creates additional patterns that are nested within or adjacent to the first patterns. The etching process then combines these nested patterns to form the final dual damascene structure with high resolution. This nested approach achieves up to two times resolution improvement while systematically managing the increased process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method improves pattern accuracy and prevents issues like trench and via openings connecting, while allowing for shrinking minimum spaces between adjacent openings, effectively addressing the limitations of conventional lithography at advanced nodes.
Implementation Method 1
a first double patterning process is performed to sequentially form a plurality of first trench openings and a plurality of second trench openings in the second cap layer and the second hard mask
Implementation Method 2
using different etching rates for various mask layers and cap layers to ensure accurate transfer of patterns to the dielectric layer
Data Source
AI summary
A manufacturing method for a dual damascene structure first includes providing a substrate having at least a dielectric layer, a first hard mask layer, a first cap layer, a second hard mask layer, and a second cap layer sequentially formed thereon, performing a first double patterning process to form a plurality of first trench openings and second trench openings in the second cap layer and the second hard mask, and the first layer being exposed in bottoms of the first trench openings and the second trench openings, performing a second double patterning process to form a plurality of first via openings and second via openings in the first cap layer and the first hard mask layer, and transferring the first trench openings, the second trench openings, the first via openings, and the second via openings to the dielectric layer to form a plurality of dual damascene openings.