Dual Damascene Hole Formation with Single-Lithography Mask Resizing
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Solution Overview
Problem
The formation of dual damascene structures in semiconductor manufacturing requires multiple costly and time-consuming photolithography processes to create vias and wiring holes, which increases fabrication complexity and costs.
Innovation Solution
A method is introduced that uses a single photolithography process to form both via and wiring holes by employing a first etch mask with a smaller critical dimension and a second etch mask with a larger critical dimension, allowing for isotropic or anisotropic etching to define the hole structures, thereby reducing the number of photolithography steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple photolithography processes are used to form dual damascene structures, then precise control over hole dimensions and depths is achieved, but fabrication complexity and costs increase
Solution Approach 1:
The patent segments the etching process into multiple stages with different masks. The first mask defines the via hole pattern, while the second mask defines the wiring hole pattern. This segmentation allows each mask to be optimized for its specific function, maintaining precision while simplifying the overall process by using standard photolithography techniques rather than a single complex process
Solution Approach 2:
The patent performs preliminary actions by first forming the via holes with the first mask before forming the wiring holes with the second mask. The via holes are etched to the full depth first, then the second mask is applied to etch the wiring holes. This preliminary action ensures that the deeper via holes are formed when the etch mask provides maximum protection, maintaining precision without requiring a completely different process approach
2Manufacturing precision
If multiple photolithography processes are used to form dual damascene structures, then precise control over hole dimensions and depths is achieved, but fabrication time increases
Solution Approach 1:
The patent merges the formation of via holes and wiring holes into a single integrated dual damascene process. Both hole types are formed using the same basic photolithography and etching techniques, combining what could have been separate processes into one unified flow. This merging reduces total fabrication time while maintaining precision through the sequential mask approach
Solution Approach 2:
The first mask and via hole formation is performed as a preliminary action before the second mask is applied. This allows the via holes to be pre-formed to their final depth, and then the second mask process can focus solely on adding the wiring holes. This preliminary action eliminates the need to re-etch or adjust via holes during the second photolithography step, reducing total time
3Manufacturing precision
If multiple photolithography processes are used to form dual damascene structures, then precise control over hole dimensions and depths is achieved, but fabrication costs increase
Solution Approach 1:
The patent segments the patterning function across two masks rather than requiring one highly complex single-step process. Each mask can be produced using standard, well-established photolithography techniques, avoiding the need for expensive custom process equipment. This segmentation makes the process more economically viable while maintaining precision
Solution Approach 2:
The patent uses universal photolithography and etching processes that can form both via holes and wiring holes. The same equipment and basic process steps are used for both mask applications, maximizing equipment utilization and reducing the need for specialized expensive process steps. This multi-functionality approach reduces fabrication costs while maintaining the ability to precisely control both hole types
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the fabrication process, reducing time and cost by enabling the formation of dual damascene structures with fewer photolithography steps while maintaining precise control over hole dimensions and depths.
Implementation Method 1
allowing for isotropic or anisotropic etching to define the hole structures
Implementation Method 2
allowing for isotropic or anisotropic etching to define the hole structures
Data Source
AI summary
Embodiments of the present disclosure provide a method for forming a hole structure in a semiconductor device. The method for forming a hole structure having a first hole portion and a second hole portion connected to and over the first portion in a stack structure of a semiconductor device includes determining a hard mask layer. An etching resistivity of the hard mask layer may be inversely proportional to a difference between a first lateral dimension of the first hole portion and a second lateral dimension of the second hole portion, and the first lateral dimension may be less than the second lateral dimension. The method may also include forming the hard mask layer over the stack structure, and patterning the hard mask layer to form a first patterned hard mask layer that has a first mask opening. The first mask opening may have the first lateral dimension. The method may further include removing a portion of the stack structure exposed by the first patterned hard mask layer to form an initial hole structure in the stack structure, and patterning the first patterned hard mask layer to form a second patterned mask layer that has a second mask opening. The second mask opening may have the second lateral dimension. The method may further include removing another portion of the stack structure exposed by the second patterned hard mask layer to form the hole structure.