Dual Damascene TSV and Wire Integration
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Solution Overview
Problem
The existing methods for forming through-substrate vias (TSVs) in stacked-chip modules using a single damascene technique are time-consuming and costly, requiring extensive back-end-of-line processing to electrically connect TSVs to on-chip devices.
Innovation Solution
A dual damascene technique is employed, where a trench and via opening are formed in dielectric layers above a semiconductor substrate, with dielectric spacers on the sidewalls, and a metal layer is deposited to simultaneously form an insulated wire and insulated TSV, reducing processing time and cost by enabling direct electrical connection between the TSV and on-chip devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single damascene technique is used to form TSVs, then the structure is simpler to form, but the processing time and cost increase due to extensive additional BEOL processing required to electrically connect TSVs to on-chip devices
Solution Approach 1:
The patent combines the TSV formation process with the wire interconnect formation process into a single dual damascene operation. The trench and via opening are formed simultaneously, and a single metal layer is deposited to create both the insulated wire in the trench and the insulated TSV in the via opening, eliminating the need for separate subsequent processing steps to establish electrical connections
Solution Approach 2:
The patent performs preliminary actions by forming the trench and via opening in a specific spatial relationship before metal deposition. The trench is positioned to connect to the via opening, and dielectric spacers are formed on the sidewalls in advance, so that when the metal layer is deposited, the electrical connection between wire and TSV is automatically established without requiring additional connection steps
2Device complexity
If a single damascene technique is used to form TSVs, then the process steps are reduced, but the cost increases due to extensive additional BEOL processing
Solution Approach 1:
The patent merges two separate manufacturing operations (TSV formation and wire interconnect formation) into a single dual damascene process. By forming both structures simultaneously through one trench/via opening formation and one metal deposition step, the total number of process steps is reduced, directly lowering manufacturing cost
Solution Approach 2:
The single metal layer deposited in the dual damascene process serves multiple functions simultaneously: it forms the insulated wire in the trench, forms the insulated TSV in the via opening, and establishes the electrical connection between them. This multi-functionality eliminates the need for separate processing steps, reducing overall manufacturing cost
3Reliability
If extensive BEOL processing is performed to electrically connect TSVs to on-chip devices, then reliable electrical connection is achieved, but processing time and cost increase
Solution Approach 1:
The patent performs preliminary action by pre-positioning the trench and via opening in spatial alignment before metal deposition. The trench is formed extending from the surface to connect with the via opening that extends into the substrate. When the metal layer is deposited, the electrical connection is automatically established in the same step that forms the conductive structures, achieving reliable connection without sacrificing productivity
Solution Approach 2:
The patent combines the structural formation and electrical connection establishment into a single integrated process. The metal layer simultaneously creates the conductive path in the wire, the conductive path in the TSV, and the electrical connection between them, ensuring reliability while maximizing production efficiency by eliminating separate connection steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the costs and processing times associated with TSV formation and semiconductor chip production, allowing for efficient integration into three-dimensional chip stacks with improved electrical connectivity.
Implementation Method 1
Dielectric spacers are formed on the vertical sidewalls of the trench and via opening
Implementation Method 2
a metal layer is deposited in order to simultaneously form an insulated wire in the trench and an insulated second via and, particularly, an insulated through-substrate via (TSV) in the via opening
Data Source
AI summary
Disclosed is a semiconductor chip having a dual damascene insulated wire and insulated through-substrate via (TSV) structure and methods of forming the chip. The methods incorporate a dual damascene technique wherein a trench and via opening are formed in dielectric layers above a substrate such that the trench is above a first via and the via opening is positioned adjacent to the first via and extends vertically from the trench and into the substrate. Dielectric spacers are formed on the sidewalls of the trench and via opening. A metal layer is deposited to form an insulated wire in the trench and an insulated TSV in the via opening. Thus, the insulated wire electrically connects the insulated TSV to the first via and, thereby to an on-chip device or lower metal level wire below. Subsequently, the substrate is thinned to expose the insulated TSV at the bottom surface of the substrate.