Dual Data Line Stack-Up for Display Backplane Charging
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Solution Overview
Problem
Active matrix display backplanes for liquid crystal displays face challenges in reducing charging time for data image signals, leading to image motion blur, especially as display resolution and refresh rates increase, with existing solutions like shifting to oxide-based transistors or multiple data lines not fully addressing the issue without aperture ratio loss.
Innovation Solution
A dual data line stack-up structure is implemented, where a column of pixel electrodes is positioned between pairs of stacked data lines, with each pixel electrode's left edge separated equally from both lower data lines, allowing for reduced charging time and consistent gate-source capacitance across the display backplane, maintaining aperture ratio and enabling higher refresh rates and resolutions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If multiple banks of data lines are included to reduce charging time, then charging time is reduced, but device complexity increases
Solution Approach 1:
The patent transitions from a planar data line arrangement to a three-dimensional stacked configuration. Multiple data lines are vertically stacked above each other, allowing simultaneous charging of multiple pixel rows through different vertical layers. This spatial reorganization reduces charging time by enabling parallel data writing while maintaining a compact form factor without significantly increasing horizontal device complexity.
Solution Approach 2:
The patent implements nested data line structures where upper data lines are positioned directly above lower data lines in a stacked configuration. This nesting allows multiple data transmission channels to be integrated within a compact vertical space, reducing the horizontal footprint while enabling faster charging through parallel data line operation.
2Manufacturing precision
If display resolution and refresh rates are increased, then image quality is improved, but charging time increases leading to motion blur
Solution Approach 1:
The patent segments the display into multiple rows that can be charged simultaneously through the stacked data line structure. Each data line stack serves specific pixel rows, allowing parallel charging operations. This segmentation enables high-resolution displays to maintain fast charging times by dividing the pixel array into multiple independently chargeable groups, thereby reducing motion blur while preserving image quality.
Solution Approach 2:
The stacked data line structure enables continuous data writing across multiple pixel rows simultaneously. By having multiple data lines active in parallel through the vertical stack, the system maintains continuous charging action across the entire display, preventing the charging time bottlenecks that cause motion blur in high-resolution, high-refresh-rate displays.
3Loss of time
If stacked data lines are used to reduce charging time, then charging time is reduced, but parasitic coupling capacitance may increase
Solution Approach 1:
The patent introduces ground shield layers as intermediary elements between the stacked data lines. These ground layers act as electrostatic shields that reduce parasitic coupling capacitance between adjacent data lines in the vertical stack. By placing ground shields between signal-carrying data lines, the structure minimizes unwanted capacitive coupling while maintaining the close proximity needed for fast charging, thus mitigating the harmful effects of parasitic capacitance.
Data Source
AI summary
Display backplanes and pixel element structures are described. In an embodiment, a pixel electrode is located between two stacked data lines, with a left edge of the pixel electrode being separated from a first lower data line by approximately a same distance as a right edge of the pixel electrode is separated from a second lower data line.