Dual-Detector PLL Switching for Wide Lock Range and Stable Sync

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Solution Overview

Problem

Phase locked circuits, particularly phase locked loops (PLLs), face limitations in their locking range, leading to abnormal operation when the phase difference between the reference and output signals exceeds a certain range, restricting their synchronization capabilities.

Innovation Solution

A phase locked circuit design that switches between a coarse phase detection circuit and a fine phase detection circuit based on the detection results, using a charge pump controller to manage the output current and frequency of the oscillator, allowing for a wider locking range and efficient synchronization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a phase detection circuit with high gain is used to synchronize and fix the phase difference, then the phase synchronization precision is improved, but the locking range becomes narrow

Engineering Contradiction:
Improvephase synchronization precisionVSAvoidlocking range
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The phase detection circuit is segmented into two distinct circuits: a first phase detection circuit with high gain for precise phase synchronization, and a second phase detection circuit with wide locking range for broad adaptability. The system switches between these segmented components based on operating conditions, allowing both high precision and wide range to be achieved at different times without compromise

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically switches between the first and second phase detection circuits based on real-time phase difference conditions. When the phase difference is small, the high-gain first circuit is activated for precision; when the phase difference exceeds the locking range, the wide-range second circuit is activated. This dynamic adaptation resolves the contradiction by making the system's characteristics changeable rather than fixed

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If the phase difference between reference signal and output signal exceeds the locking range, then the circuit can handle larger phase variations, but the phase detection circuit operates abnormally

Engineering Contradiction:
Improvephase difference toleranceVSAvoiddetection circuit operation reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

A phase difference determination circuit acts as an intermediary that monitors the phase difference and controls the switching between the first and second phase detection circuits. This intermediary ensures that when large phase differences occur, the system transitions to the appropriate circuit, preventing abnormal operation while maintaining reliability across the full range of phase variations

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system employs dynamic switching between detection circuits based on the magnitude of phase difference. The first circuit handles small phase differences with high reliability, while the second circuit handles large phase differences beyond the first circuit's locking range. This dynamic reconfiguration maintains operational reliability across all phase difference conditions

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10897259B1Phase locked circuit, method of operating the same, and transceiver
Publication Date: 2021.01.19 SAMSUNG ELECTRONICS CO LTD
  • US10897259B1 patent drawing
  • US10897259B1 patent drawing
  • US10897259B1 patent drawing

AI summary

A phase locked circuit includes an oscillator configured to generate an output clock signal, a first phase detector configured to detect a phase difference between an input clock signal and a feedback clock signal based on the output clock signal, a second phase detector having a wider phase locking range than that of the first phase detector and configured to detect the phase difference between the input clock signal and the feedback clock signal, and a charge pump controller configured to control an output current of a charge pump included in the second phase detector based on the phase difference detected by the first phase detector. When the phase difference between the input clock signal and the feedback clock signal is within the phase locking range of the first phase detector, the oscillator and the first phase detector are connected to each other.