Dual-Domain Dynamic Reference Reading for Resistive Memory Reliability
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Solution Overview
Problem
Conventional resistive memory devices suffer from read errors due to small resistance differences between stored '0' and '1' data, process variations, offset voltage of sense amplifiers, and noise, leading to unreliable read operations.
Innovation Solution
A nonvolatile resistive memory device employs a dynamic reference in a dual domain (voltage and time domain) read method by varying the sampling time of the reference voltage based on the logic value stored in the data cell, using a time domain detecting circuit and sample/hold circuit to amplify the voltage difference between data and reference voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional read operation is used with a fixed reference voltage, then the read operation is simple and fast, but the read reliability is low due to small resistance differences and process variations
Solution Approach 1:
The patent applies dynamics by making the reference voltage dynamic rather than fixed. The reference voltage is adjusted based on the discharge status of the bit line, creating a dynamic reference that adapts to the actual read conditions. This dynamic adjustment compensates for process variations and small resistance differences, thereby improving read reliability without requiring complex additional circuitry
Solution Approach 2:
The patent implements feedback by using the discharge status of the bit line (detected through voltage threshold comparison) to control the timing of reference voltage sampling. The discharge detection circuit provides feedback about the read state, which then influences when the reference voltage is sampled, creating a closed-loop system that improves read accuracy while maintaining operational simplicity
2Measurement precision
If the sampling time of reference voltage is fixed, then the read operation is simple, but the sensing margin is small leading to read errors
Solution Approach 1:
The patent applies preliminary action by precharging both the bit line and reference line to the same voltage level before the read operation begins. This preliminary precharging ensures that both lines start from an identical state, eliminating initial voltage differences that would reduce the sensing margin. The synchronized precharging is completed before data discharge, maximizing the voltage difference that develops during the read operation
Solution Approach 2:
The patent makes the reference voltage sampling time dynamic rather than fixed. The sampling occurs at a specific moment determined by the discharge status of the bit line (when it reaches a threshold voltage), rather than at a predetermined fixed time. This dynamic timing optimization maximizes the voltage difference between data and reference lines, thereby maximizing the sensing margin while adding minimal time overhead
3Reliability
If a dynamic reference voltage sampling method is used, then the sensing margin is increased and read errors are reduced, but the read operation becomes more complex
Solution Approach 1:
The patent introduces a discharge detection circuit as an intermediary component that monitors the bit line voltage and generates control signals for the reference voltage sampling timing. This intermediary circuit acts as a mediator between the data discharge process and the reference voltage sampling, automatically determining the optimal sampling moment without requiring complex control logic. The intermediary approach increases read accuracy while adding minimal circuit complexity
Solution Approach 2:
The patent implements self-service by designing the reference voltage sampling system to automatically adjust its timing based on the actual discharge status of the bit line. The discharge detection circuit self-generates the control signals needed for optimal sampling without external intervention. This self-adjusting mechanism improves read accuracy while avoiding the need for complex external control circuits, as the system serves itself
Data Source
AI summary
Disclosed is a method of reading a nonvolatile resistive memory device including a data cell and a reference cell. The method includes precharging a first bit line connected to the data cell and a second bit line connected to the reference cell, discharging a voltage precharged to the first bit line and the second bit line to a source node through the data cell and the reference cell, sampling a reference voltage developed to the second bit line at a first time when a voltage of the first bit line reaches a threshold voltage, sampling a data voltage developed to the first bit line at a second time when a voltage of the second bit line reaches the threshold voltage, and sensing and amplifying a difference value between the reference voltage and the data voltage and outputting the sensed and amplified difference value as output data.