Dual-Dopant Guard Ring Layout for Compact ESD Isolation
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Solution Overview
Problem
Existing guard ring designs for integrated circuits, particularly those involving FinFET devices, face challenges in efficiently dissipating electro-static discharge (ESD) energy while maintaining a high holding voltage and minimizing interference between adjacent devices, often requiring increased spacing that occupies valuable chip area.
Innovation Solution
A dual-dopant type guard ring structure where inner and outer guard rings have opposite dopant types, allowing them to be in contact, reducing the chip area and enhancing ESD energy dissipation through fin structures connected to a reference voltage, thereby increasing the holding voltage and reducing interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the space between adjacent guard rings is increased, then the holding voltage of the circuit device is increased, but the chip area occupied is increased
Solution Approach 1:
The patent merges adjacent guard rings of opposite dopant types into direct contact, eliminating the need for spacing between them. This combining approach allows the guard rings to maintain their ESD protection and holding voltage functions while removing the wasted space between traditionally spaced guard rings, thus resolving the contradiction between reliability and chip area.
Solution Approach 2:
Instead of spacing guard rings apart to increase holding voltage, the patent inverts the conventional approach by placing opposite-dopant guard rings in direct contact. This inversion leverages the complementary nature of opposite dopant types to achieve enhanced holding voltage through the formation of depletion regions at the contact interface, while simultaneously reducing chip area.
2Area of stationary object
If guard rings are placed closer together, then chip area is reduced, but interference between adjacent devices increases
Solution Approach 1:
The patent applies local quality by using alternating dopant types in adjacent guard rings. This creates localized depletion regions at the contact interfaces between opposite-dopant guard rings, which act as electrical barriers that prevent interference between adjacent devices. The local depletion regions maintain device isolation even when guard rings are placed close together, resolving the contradiction between chip area reduction and interference prevention.
Solution Approach 2:
The depletion region formed at the contact interface between opposite-dopant guard rings acts as an intermediary barrier. This depletion region mediates the interaction between adjacent guard rings, blocking electrical interference while allowing the guard rings to be placed in direct contact for space efficiency. The intermediary depletion region enables close spacing without compromising device isolation.
3Reliability
If guard rings are spaced further apart, then holding voltage is increased, but ESD energy dissipation capability is reduced
Solution Approach 1:
The patent combines opposite-dopant guard rings in direct contact to create continuous ESD protection paths. The merging of guard rings maintains comprehensive coverage for ESD energy dissipation while the opposite dopant types create depletion regions that sustain holding voltage, resolving the contradiction between energy dissipation capability and holding voltage.
Solution Approach 2:
The patent uses a composite structure of alternating dopant types in adjacent guard rings. This composite arrangement creates a material system where the interaction between opposite dopants generates depletion regions that provide both holding voltage and ESD protection, achieving both functions simultaneously without requiring increased spacing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dual-dopant guard ring structure effectively dissipates ESD energy, increases holding voltage, and minimizes interference between adjacent devices, all while reducing the overall chip area, thus enhancing the reliability and efficiency of integrated circuits.
Implementation Method 1
Guard rings also help to dissipate energy in a circuit device during an electro-static discharge (ESD) event. An ESD event occurs when a large flow of electricity passes from one element to another.
Implementation Method 2
A first set of guard rings includes a first guard ring around a periphery of core circuitry. Each guard ring of the first set of guard rings includes a same dopant type. A second set of guard rings includes a second guard ring around a periphery of the first guard ring. Each guard ring of the second set of guard rings includes a same dopant type, which is opposite to the dopant type of the first set of guard rings.
Data Source
AI summary
A circuit device includes core circuitry. The circuit device further includes a first plurality of guard rings having a first dopant type, wherein the first plurality of guard rings is around a periphery of the core circuitry. The circuit device further includes a second plurality of guard rings having a second dopant type, wherein the second dopant type is opposite to the first dopant type, and at least one guard ring of the second plurality of guard rings is around a periphery of at least one guard ring of the first plurality of guard rings. Guard rings of the first plurality of guard rings are in a concentric arrangement.