Heterogeneous Dual-DSP Voice Chip for Single-Chip Speech Processing
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Solution Overview
Problem
The high implementation costs associated with dual-chip designs in intelligent voice products due to the need for two separate voice chips to perform different functions.
Innovation Solution
A voice chip implementation method using two Digital Signal Processors (DSPs) with heterogeneous designs, sharing the same DSP core IP, to replace dual chips with a single chip, where each DSP performs distinct functions such as voice wake-up and voice recognition, and operating system, voice compression transmission, and extended wireless protocol connection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If dual-chip design is adopted to complete different processing functions, then functional versatility is improved, but implementation cost increases
Solution Approach 1:
The patent merges two separate voice chips into a single integrated voice chip that contains two DSPs. The first DSP handles wake-up word detection and the second DSP handles voice recognition, signal denoising and other processing functions. This consolidation maintains all required functionalities while reducing the number of discrete components, thereby lowering implementation costs and simplifying the system architecture.
Solution Approach 2:
The integrated voice chip is designed with multi-functionality to perform multiple tasks simultaneously. The first DSP is dedicated to wake-up word detection while the second DSP handles voice recognition, signal denoising, and other processing functions. This universal design allows a single chip to replace what previously required two separate chips, achieving cost reduction without sacrificing functional versatility.
2Adaptability or versatility
If two separate voice chips are used to perform different functions, then functional specialization is improved, but device complexity increases
Solution Approach 1:
The patent combines two functionally specialized chips into one integrated chip containing two DSPs with distinct roles. The first DSP specializes in wake-up word detection while the second DSP specializes in voice recognition and signal processing. This merging maintains functional specialization internally while reducing external complexity by eliminating the need for two separate physical chips and their associated interconnections.
3Productivity
If dual-chip design is implemented to achieve different processing functions, then processing capability is improved, but implementation cost increases
Solution Approach 1:
The patent merges two separate processing chips into a single integrated voice chip that maintains both processing capabilities. The first DSP provides wake-up word detection capability while the second DSP provides voice recognition and signal denoising capability. This integration preserves the dual-processing capability while reducing implementation cost by eliminating the need for two separate chips, reducing BOM costs, and simplifying assembly processes.
Data Source
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AI summary
The present disclosure provides a method of voice chip implementation, a voice chip, an intelligent voice product, an electronic device, and a storage medium, and relates to the field of artificial intelligence (Al) such as intelligent voice and Al chips. The method may include: constructing a voice chip including a first Digital Signal Processor (DSP) and a second DSP, the first DSP and the second DSP corresponding to a same Digital Signal Processor core Identifier (DSP core IP) and adopting heterogeneous designs; and completing a chip processing function in a corresponding intelligent voice product by using the voice chip, wherein different functions are completed by using the first DSP and the second DSP respectively. By use of the solutions of the present disclosure, implementation costs can be reduced.