Dual DWA Delta-Sigma DAC for Linearity and Transient Noise
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Solution Overview
Problem
As system designs in digital-to-analog converters (DACs) become larger and use more bits to achieve high linearity with low oversampling rates, they face nonlinearity issues due to increased switching energy, which challenges the effectiveness of traditional data weighted averaging (DWA) algorithms.
Innovation Solution
Implementing a dual-DWA technique with two DWA loops, each controlling half of the output elements, and optionally incorporating a constant offset or round-robin allocation of bits to maintain linearity and reduce transient noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the number of bits in DAC is increased to achieve high linearity, then output linearity is improved, but switching energy increases causing nonlinearity distortion
Solution Approach 1:
The patent divides the single DWA loop into two separate DWA loops, each controlling a subset of output elements. This segmentation allows the switching energy to be distributed across multiple smaller loops, reducing the transient effects and nonlinearity distortion in each individual loop while maintaining overall high linearity performance.
Solution Approach 2:
The patent employs dynamic allocation of bits between the two DWA loops, where the allocation can be adjusted based on operating conditions. This dynamic approach allows the system to optimize the distribution of switching energy and maintain linearity across different input ranges, preventing the accumulation of nonlinearity distortion.
2Manufacturing precision
If traditional DWA algorithm is used in large-scale DAC designs, then device mismatch distortion is reduced, but nonlinearity increases due to large switching energy
Solution Approach 1:
By segmenting the DWA algorithm into two separate loops, each loop handles a portion of the output elements with reduced switching energy. This maintains the mismatch distortion reduction benefit of DWA while avoiding the nonlinearity problems that arise from large-scale switching in a single loop.
Solution Approach 2:
The patent introduces an allocation mechanism that acts as an intermediary between the input signal and the two DWA loops. This allocation mechanism dynamically distributes the input signal between the loops, ensuring that switching energy is managed effectively and nonlinearity is minimized while still achieving mismatch distortion reduction.
3Measurement precision
If more output elements are activated to represent higher input values, then output accuracy is improved, but transient noise increases
Solution Approach 1:
The patent segments the output elements into two groups, each controlled by a separate DWA loop. When high input values require activation of many output elements, the activation is distributed across both loops, which reduces the transient noise generated by simultaneous switching while maintaining the accuracy represented by the total number of activated elements.
Data Source
AI summary
Methods and apparatuses enable generating an analog representation of an M-bit digital input. A DAC system receives the M-bit data word and generates a control signal to control the output elements of a DAC to output an analog representation of the input data word. The DAC includes two data weighted averaging (DWA) loops, each one having 2M bits to control corresponding groups of 2M output elements. The control signal includes a number of bits equal to the number of output elements, with a number of one bits equal to the number of output elements to activate to represent the input data word. Half of the number of ones are triggered by one of the DWA loops, and the other half are triggered by the other DWA loop. One of the loops may include a constant offset in addition to the variable number of ones that represents the input data word.