Dual Encapsulation Package Structure for Flat Thinned Surfaces

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The quality of the encapsulant surface in semiconductor package structures is critical for the integrity of circuit layers, particularly after thinning processes, with issues arising from surface flatness and smoothness.

Innovation Solution

A package structure design incorporating a dual encapsulation layer system, where a first encapsulation layer encapsulates a lower portion of the interconnector and a second encapsulation layer encapsulates an upper portion, with the second layer having a higher elevation to ensure alignment and smoothness of the top surface, thereby maintaining flatness during grinding processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single encapsulation layer is used, then the device complexity is reduced, but the surface flatness and smoothness deteriorate after thinning process

Engineering Contradiction:
Improveencapsulation layer structureVSAvoidsurface flatness
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The encapsulation layer is divided into a first encapsulation layer and a second encapsulation layer with different elevations. The first encapsulation layer has a first top surface and the second encapsulation layer has a second top surface at a higher elevation, allowing selective grinding of the first layer while preserving the flat second layer surface.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first encapsulation layer is designed with a lower elevation and acts as a sacrificial layer that is removed first during the thinning process. This preliminary removal exposes the flat second encapsulation layer surface, ensuring the final surface quality without requiring the entire encapsulation structure to be ground down.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If the second encapsulation layer is placed at the same elevation as the first layer, then the device complexity is minimized, but the surface smoothness and alignment quality deteriorate

Engineering Contradiction:
Improveencapsulation layer configurationVSAvoidsurface alignment
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The two encapsulation layers are positioned asymmetrically in the vertical direction, with the second encapsulation layer at a higher elevation than the first. This asymmetric arrangement creates a stepped structure where the higher second layer provides a stable, flat reference surface for alignment while the lower first layer can be selectively removed.

Inventive Principle:
Principle #4Asymmetry

3Manufacturing precision

If a dual encapsulation layer system is used, then the surface flatness is improved, but the device complexity increases

Engineering Contradiction:
Improvesurface flatnessVSAvoidencapsulation layer structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The solution moves from a single-plane encapsulation to a multi-elevation encapsulation structure by utilizing the vertical dimension. The first and second encapsulation layers are stacked at different elevations, creating a three-dimensional stepped configuration that enables selective material removal while maintaining surface flatness.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Productivity

If the first encapsulation layer is made thinner, then the productivity is improved, but the surface smoothness and void prevention deteriorate

Engineering Contradiction:
Improvethinning process efficiencyVSAvoidsurface smoothness
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The second encapsulation layer is positioned at a higher elevation to serve as a cushioning or protective layer. During the thinning process, this higher layer acts as a buffer that prevents void formation and maintains surface smoothness while the lower first layer is removed to achieve the desired thickness reduction and productivity improvement.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS20250210433A1Package structure
Publication Date: 2025.06.26 ADVANCED SEMICON ENG INC
  • US20250210433A1 patent drawing
  • US20250210433A1 patent drawing
  • US20250210433A1 patent drawing

AI summary

A package structure includes an interconnector, a first encapsulation layer, a second encapsulation layer. The interconnector includes a lower portion and an upper portion located on the lower portion. The first encapsulation layer encapsulates the lower portion, and has a first top surface adjacent to the upper portion. The first top surface includes a first region and a second region different from the first region. The second encapsulation layer encapsulates the upper portion, and has a second bottom surface and a second top surface. The second bottom surface faces the first top surface. The second top surface is opposite to the second bottom surface. The second top surface includes a third region and a fourth region different from the third region. A first elevation difference between a first elevation of the first region and a second elevation of the second region is greater than a second elevation difference between a third elevation of the third region and a fourth elevation of the fourth region.