Dual Error Correction Circuits for Mixed-Quality Transmission Lines

Solution Overview

Problem

Conventional communication devices with high error correction capabilities require large circuit scales and high power consumption, which hinders the improvement of overall transmission characteristics while reducing data errors.

Innovation Solution

The implementation of a dual error correction circuit system, where a high-capability LDPC error correction circuit is paired with a lower-capability Reed-Solomon error correction circuit, allowing for efficient distribution of data across multiple transmission lines to optimize error correction while minimizing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a high-capability error correction circuit is used to reduce data errors, then transmission characteristics are improved, but power consumption increases

Engineering Contradiction:

Improveerror correction capabilityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The error correction function is divided into two separate circuits: a first error correction circuit with high error correction capability and a second error correction circuit with lower error correction capability. This segmentation allows the system to distribute data across multiple correction paths, achieving reliable error correction while reducing overall power consumption by utilizing the lower-capability circuit for portions of the data.

Inventive Principle:

Principle #1Segmentation

2Reliability

If a high-capability error correction circuit is used to reduce data errors, then transmission characteristics are improved, but circuit scale increases

Engineering Contradiction:

Improveerror correction capabilityVSAvoidcircuit scale

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The error correction function is divided into two separate circuits: a first error correction circuit with high error correction capability and a second error correction circuit with lower error correction capability. This segmentation allows the system to distribute data across multiple correction paths, achieving reliable error correction while reducing overall power consumption by utilizing the lower-capability circuit for portions of the data.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentEP3550728B1Error correction device, error correction method, and communication device

Publication Date: 2022.07.06 NTT ELECTORNICS CORP

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AI summary

A plurality of error correction circuits corrects errors of the data transmitted through the plurality of transmission lines. A combining portion (12) combines the plurality of transmission lines to the plurality of error correction circuits. The plurality of transmission lines includes a first transmission line (I), and a second transmission line (II) having a lower transmission characteristic than the first transmission line. The plurality of error correction circuits includes a first error correction circuit (8a), and a second error correction circuit (8b) having lower error correction capability and power consumption than the first error correction circuit (8a). The combining portion (12) uses a function to combine a plurality of error correction circuits with one transmission path, combines the first transmission line (I) with the second error correction circuit (8b) at a higher rate than the first error correction circuit (8a), and combines the second transmission line (II) with the first error correction circuit (8a) at a higher rate than the second error correction circuit (8b).