Dual Etch Stop Layer Interconnect Structure for Void Prevention
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Solution Overview
Problem
In the fabrication of integrated chips, existing interconnect structures face challenges in maintaining the integrity of conductive features during etching processes due to the lack of effective etch stop layers that prevent damage and void formation, particularly with the transition from low-k dielectric materials and the use of copper as a conductive material.
Innovation Solution
The implementation of a dual etch stop layer structure, comprising a metal compound etch stop layer and a silicon compound etch stop layer, with specific thickness ranges and dry etch selectivities, to protect conductive features during dry etching and prevent void formation, while allowing precise control over the etching process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single etch stop layer is used, then the structure is simpler, but it cannot effectively prevent damage to conductive features and void formation during dry etching
Solution Approach 1:
The etch stop function is segmented into two separate layers: a first etch stop layer (silicon compound) and a second etch stop layer (metal compound). Each layer provides etch stop functionality for different etching scenarios, ensuring comprehensive protection of conductive features while maintaining manufacturing simplicity through standardized deposition processes
Solution Approach 2:
The patent employs composite material structure with two distinct etch stop layers having different material compositions (silicon compound and metal compound). This composite approach leverages the complementary etch selectivity properties of different materials to achieve superior protection during dry etching processes compared to a single-material layer
2Reliability
If etch stop layers are made thinner, then the structure is more compact, but penetration through the etch stop layers during etching becomes more likely
Solution Approach 1:
The total etch stop thickness requirement is segmented across two layers, allowing each individual layer to be relatively thin while collectively providing sufficient resistance to etch penetration. The first etch stop layer (50-200 nm) and second etch stop layer (50-200 nm) work together to prevent void formation and damage to underlying conductive features
Solution Approach 2:
The composite structure of two etch stop layers with different material properties provides enhanced resistance to etch penetration compared to a single thick layer. The different etch selectivities of silicon compound and metal compound layers create a more effective barrier against plasma etching, preventing penetration even when individual layers are thin
3Reliability
If copper is used as conductive material, then electrical performance is improved, but the conductive features become more susceptible to damage and void formation during etching
Solution Approach 1:
The etch stop layers are deposited beforehand to establish a protective barrier before the dry etching process that forms conductive features. This preliminary protection prevents plasma damage and void formation in copper conductors during subsequent etching operations, ensuring integrity of the electrical connections
Solution Approach 2:
The etch stop layers serve as intermediary protective structures between the etching plasma and the copper conductive features. These layers absorb the harmful effects of plasma etching, preventing direct interaction with the copper and thereby eliminating the susceptibility to damage and void formation while maintaining copper's superior electrical performance
4Reliability
If low-k dielectric materials are used, then device performance is improved, but the conductive features become more vulnerable to damage during etching processes
Solution Approach 1:
The etch stop layers are deposited in advance to create a protective foundation before forming conductive features in low-k dielectric materials. This preliminary structure prevents collateral damage to the delicate low-k material and associated conductors during subsequent etching processes, preserving device performance
Solution Approach 2:
The etch stop layers act as intermediary protective barriers that shield the conductive features embedded in low-k dielectric from direct plasma exposure. This mediation prevents the harmful effects of etching on both the conductors and the surrounding low-k material, maintaining the integrity and performance benefits of the low-k structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This dual etch stop layer approach effectively prevents damage to conductive features and controls void formation, ensuring reliable and efficient fabrication of interconnect structures by maintaining high dry etch selectivity and preventing penetration through the etch stop layers during the etching process.
Implementation Method 1
with specific thickness ranges and dry etch selectivities, to protect conductive features during dry etching
Data Source
AI summary
An interconnect structure and a method of forming an interconnect structure are disclosed. The interconnect structure includes a lower conductive feature in a lower low-k (LK) dielectric layer; a first etch stop layer (ESL) over the lower conductive feature, wherein the first ESL comprises a metal compound; an upper LK dielectric layer over the first ESL; and an upper conductive feature in the upper LK dielectric layer, wherein the upper conductive feature extends through the first ESL and connected to the lower conductive feature. The interconnect structure may further include a second ESL between the upper LK dielectric layer and the first ESL, or between the first ESL and the lower conductive feature, wherein the second ESL comprises a silicon compound.