Dual Etch Stop Layers for FinFET Contact Profile Control
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Solution Overview
Problem
The challenge in semiconductor manufacturing is to improve the integration density of electronic components by reducing the minimum feature size while ensuring better profiles and electrical connections in semiconductor devices, particularly in FinFETs, where etch stop layers are needed to manage the thickness and shape of conductive features over gate stacks and source/drain regions.
Innovation Solution
The formation of etch stop layers within recesses of contact plugs in semiconductor devices, which helps in reducing the overall thickness of the device and improves the profiles of conductive features, enhancing electrical connections by using materials like silicon nitride or silicon oxide during the gate-last process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If etch stop layers are added to control conductive feature thickness and shape, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The patent divides the etch stop function into multiple separate layers (first etch stop layer over source/drain region, second etch stop layer over gate structure) with different thicknesses and materials. This segmentation allows independent optimization of each layer's thickness and etch selectivity, improving precision control of conductive feature profiles while managing complexity through functional division.
Solution Approach 2:
The patent applies different materials and thicknesses for etch stop layers at different locations: the first etch stop layer over source/drain regions has different properties than the second etch stop layer over the gate structure. This local differentiation enables tailored etch stop performance for each region, improving overall manufacturing precision by addressing specific local requirements.
2Productivity
If feature size is reduced to improve integration density, then productivity is improved, but manufacturing precision becomes more difficult to maintain
Solution Approach 1:
The patent forms etch stop layers in advance before depositing the conductive feature material. These pre-formed layers with controlled thicknesses and high etch selectivity provide a foundation that enables precise etching of subsequent layers, even at reduced feature sizes. The preliminary establishment of these reference layers maintains manufacturing precision despite scaling to higher integration densities.
Data Source
AI summary
A semiconductor device including an etch stop layer and a method of forming is provided. The semiconductor device may include a source/drain region and a gate structure, wherein a first etch stop layer is over a conductive plug to a source/drain region and a second etch stop layer is over the gate structure. The first etch stop layer and the second etch stop layer may have different thicknesses. A dielectric layer may be formed over the first etch stop layer and the second etch stop layer, and contacts may be formed through the dielectric layer and the first and second etch stop layers.