Dual Feed-Forward Equaliser for ISI Compensation

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Solution Overview

Problem

Current signal receiver technologies face challenges in addressing inter-symbol interference (ISI) in optical communication systems, particularly due to high computational complexity of soft decision decoding methods like SOVA and BCJR, which restrict their application in power-sensitive systems.

Innovation Solution

A signal receiver design incorporating two feed-forward equalizers with a central tap effectively set to zero, along with a summation unit and symbol estimator, to form a sum signal that aligns and filters inputs, enabling lower complexity and improved performance while maintaining close performance to leading systems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If soft decision decoding methods (SOVA or BCJR) are used to compensate for ISI and generate soft information, then the probability of sequence errors is minimized and performance is improved, but the computational complexity increases significantly, prohibiting their application in power-sensitive systems

Engineering Contradiction:
Improveprobability of sequence errorsVSAvoidcomputational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the equalization process into two separate feed-forward equalizers (FFE1 and FFE2) operating in parallel. FFE1 processes the estimated signal while FFE2 processes the received signal, with their outputs combined to produce soft information. This segmentation allows the system to achieve soft decision performance without requiring the complex bidirectional calculations of BCJR or iterative decoding of SOVA, thereby reducing computational complexity while maintaining reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary hard decision feed-forward equalizer (FFE3) that generates hard decisions from the received signal. These hard decisions serve as a mediator to reconstruct the ISI component, which is then subtracted from the received signal to produce a cleaned signal for soft information generation. This intermediary approach enables soft decision performance without requiring complex iterative algorithms, resolving the contradiction between reliability and computational complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If BCJR algorithm is used for maximum a posterior detection, then optimal performance is achieved, but the algorithm involves calculation of forward probabilities and backward probabilities based on trellis, making it highly complex

Engineering Contradiction:
Improvemaximum a posterior detection performanceVSAvoidalgorithm complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts only the necessary forward path metric calculation from the BCJR algorithm, eliminating the computationally intensive backward probability calculations. By using a feed-forward structure that processes symbols in a single pass and combines outputs from multiple FFEs, the system achieves comparable performance to BCJR without requiring the full bidirectional trellis computation, thereby significantly reducing algorithmic complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the complex, resource-intensive BCJR algorithm with simpler, computationally inexpensive feed-forward equalizer structures. These FFEs use basic filtering operations and linear combinations that require minimal computational resources, making them suitable for power-sensitive systems while still providing effective ISI compensation and soft information generation.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Loss of information

If SOVA algorithm is used with modified path metric and soft output, then soft information is generated, but the algorithm needs to store soft information for each bit and update it at each step, making complexity considerably higher than MLSE

Engineering Contradiction:
Improvesoft information generationVSAvoidcomplexity compared to MLSE
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

The patent segments the soft information generation process into parallel FFE branches that independently process different aspects of the signal. Instead of sequentially updating soft information for each bit as in SOVA, the parallel FFE structure generates soft information simultaneously through linear combinations of filtered signals, eliminating the need for iterative updates and reducing memory requirements while maintaining soft information quality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates multiple copies of the feed-forward equalizer structure (FFE1, FFE2, and optionally FFE3) that process the input signal through different filtering paths. Each FFE produces a version of the equalized signal that is then combined to generate soft information. This copying approach replaces the complex sequential soft information updating of SOVA with parallel, computationally simpler operations that achieve the same goal with reduced complexity.

Inventive Principle:
Principle #26Copying

Data Source

PatentEP4140046B1Equalisation method and apparatus
Publication Date: 2024.07.31 HUAWEI TECH CO LTD
  • EP4140046B1 patent drawingFigure 1
  • EP4140046B1 patent drawingFigure 2
  • EP4140046B1 patent drawingFigure 3

AI summary

A signal receiver comprising: an input for receiving an input signal comprising multiple symbols; a sequence estimator configured to receive the input signal and form an estimate of a most likely content of the input signal; a first feed-forward equaliser for receiving the estimate or a signal derived therefrom and filtering it to form a first equaliser output, the first feed-forward equaliser being configured so that its central tap is effectively zero; a second feed-forward equaliser for receiving the input signal and filtering it to form a second equaliser output; a summation unit configured to sum the first and second equaliser outputs to form a sum signal, the receiver being configured so that the summation unit sums the first and second equaliser outputs in synchronisation with respect to their dependence on the input signal; and a symbol estimator configured to estimate a symbol stream in dependence on the sum signal.