Dual-Feed PMIC for Memory Backup Power and Safe Shutdown

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Solution Overview

Problem

Existing memory systems face challenges in managing power requirements during power failures, leading to potential data loss and increased complexity and cost due to the need for additional circuitry to support backup power supplies.

Innovation Solution

A power management integrated circuit (PMIC) with dual power feed capability, utilizing diodes to combine power inputs from a host and a backup power supply, enabling seamless operation and reducing the need for additional circuitry by integrating backup power control within the PMIC.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional circuitry is added to support backup power supplies, then power management capability is improved, but device complexity and cost increase

Engineering Contradiction:
Improvepower management capabilityVSAvoidcircuitry complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines backup power supply control functions directly into the PMIC chip, merging previously separate power management functions into a single integrated device. This eliminates the need for external backup power control circuitry, reducing overall system complexity while maintaining comprehensive power management capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The PMIC is designed to perform multiple functions including both primary power management and backup power supply control within a single device. This multi-functionality approach allows the PMIC to handle various power management tasks without requiring additional dedicated circuitry for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If additional circuitry is added to support backup power supplies, then power management capability is improved, but manufacturing cost increases

Engineering Contradiction:
Improvepower management capabilityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

By integrating backup power control functions into the PMIC, the patent reduces the total component count and bill of materials. This consolidation eliminates the need for separate external control circuitry, directly reducing manufacturing costs while maintaining full power management capability.

Inventive Principle:
Principle #5Merging (Combining)

3Area of stationary object

If external components are eliminated, then board space is reduced, but integration complexity within PMIC increases

Engineering Contradiction:
Improveboard spaceVSAvoidPMIC integration complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent integrates backup power control functions directly into the PMIC chip architecture, consolidating multiple power management functions into a single device. This internal integration reduces the number of external components and frees up board space, while the complexity is managed through systematic chip-level integration.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The PMIC ensures glitch-free operation during power failures, reduces costs, and minimizes board space by eliminating external components, ensuring data integrity and efficient shutdown processes.

Implementation Method 1

utilizing diodes to combine power inputs from a host and a backup power supply

Methodology Applied
Scientific EffectDiode: Diode

Data Source

PatentUS20260018194A1Power management integrated circuit with dual power feed
Publication Date: 2026.01.15 LODESTAR LICENSING GROUP LLC
  • US20260018194A1 patent drawing
  • US20260018194A1 patent drawing
  • US20260018194A1 patent drawing

AI summary

A power management circuit receives power from a host and a backup power supply in parallel and uses power from at least one of the host and the backup power supply to operate voltage regulators for a memory system. An enable signal is generated based on whether or not the voltage regulators are powered. The enable signal can be used to keep the backup power supply on while the memory system is in operation. In response to absence of power from the host, the circuit generates an interrupt signal causing the memory system to shut down safely without data loss.