Dual Floating Diffusion Transistor Vertical Gate Image Sensor
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Solution Overview
Problem
Standard CMOS image sensors have a limited dynamic range, struggling to capture details in both bright highlights and dim shadows due to their limited ability to handle the wide luminance range of natural scenes, which is addressed by incorporating high dynamic range (HDR) technologies.
Innovation Solution
The implementation of a high dynamic range pixel array with dual floating diffusion (DFD) transistors that include DFD gate structures with vertical portions, allowing for switchable conversion gain to achieve a high signal-to-noise ratio in low light and low conversion gain in bright light, thereby widening the dynamic range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If standard CMOS image sensor structure is used, then device complexity is low, but dynamic range is limited
Solution Approach 1:
The pixel is divided into two separate floating diffusion regions: a first floating diffusion for capturing bright light signals and a second floating diffusion for capturing dim light signals. This segmentation allows each diffusion region to be optimized for its specific luminance range, enabling the sensor to handle a much wider dynamic range without proportionally increasing overall device complexity
Solution Approach 2:
The patent introduces a vertical gate structure that extends into the substrate, adding a vertical dimension to the gate configuration. This vertical extension increases the gate-to-channel interaction area and coupling capacitance without increasing the lateral footprint, thereby enhancing dynamic range capability while maintaining compact pixel layout
2Adaptability or versatility
If multiple exposures are merged to achieve HDR, then dynamic range is increased, but loss of time occurs
Solution Approach 1:
The pixel simultaneously captures both bright and dim light signals in a single exposure by using two separate floating diffusion regions. The first floating diffusion captures bright light while the second captures dim light, eliminating the need for multiple sequential exposures and thus avoiding time loss while achieving HDR capability
Solution Approach 2:
The dual floating diffusion structure enables continuous simultaneous capture of signals across the entire luminance range in one exposure event. Both diffusion regions operate concurrently during the same integration period, maintaining continuous useful action without interruption for multiple exposures
3Reliability
If vertical gate structure is added to DFD transistor, then coupling capacitance is increased, but device complexity increases
Solution Approach 1:
The vertical gate structure is implemented locally at the DFD transistor gate region rather than throughout the entire pixel. This localized modification increases coupling capacitance and improves signal-to-noise ratio specifically where needed for dual floating diffusion operation, without unnecessarily complicating other parts of the pixel structure
Solution Approach 2:
The gate structure extends vertically into the substrate, utilizing the vertical dimension to increase coupling capacitance. This vertical extension provides additional gate-to-channel interaction area without increasing the lateral footprint, thereby improving signal-to-noise ratio while maintaining compact device layout
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the dynamic range of image sensors, enabling them to capture a broader range of luminance levels, effectively addressing the limitations of standard CMOS image sensors by providing improved contrast and detail in both bright and dark areas of images.
Implementation Method 1
The image sensor includes an array of pixels having photosensitive elements (e.g., photodiodes) that absorb a portion of the incident image light and generate image charge upon absorption of the image light
Data Source
AI summary
A pixel circuit includes a photodiode and a floating diffusion disposed in a semiconductor substrate. A transfer gate is disposed between the photodiode and the floating diffusion to transfer photogenerated image charge from the photodiode to the floating diffusion. A dual floating diffusion (DFD) transistor is coupled between the floating diffusion and a DFD capacitor. The DFD transistor includes a DFD gate that includes a planar gate portion disposed over a surface of the semiconductor substrate and a vertical gate portion that extends vertically from the planar gate portion into the semiconductor substrate. The vertical gate portion of the DFD gate is configured to increase a gate to substrate coupling capacitance of the DFD transistor. The gate to substrate coupling capacitance and the DFD capacitor are coupled to increase an effective capacitance associated with the floating diffusion in response to the DFD transistor being turned on.