Dual Conversion Gain ADC Circuit for Lower Image Sensor Power

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing analog-to-digital converters (ADCs) in image sensors face increased power consumption due to the need for improved signal resolution and processing efficiency, which is not optimally managed in current dual conversion gain operations.

Innovation Solution

An analog-to-digital converting circuit that includes a comparator and counter to selectively generate conversion gain output signals based on signal requirements, optimizing power consumption by controlling the generation of conversion gain output signals based on signal-to-noise ratio and illuminance conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If dual conversion gain operation is performed to improve signal resolution, then measurement precision is improved, but power consumption increases

Engineering Contradiction:
Improvesignal resolutionVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic selection between first and second conversion gain operations based on illuminance conditions. The system transitions from static dual conversion gain to adaptive dynamic operation, where the conversion gain mode is adjusted in real-time according to lighting conditions, thereby improving signal resolution when needed while reducing power consumption when not required

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the conversion gain parameter dynamically based on illuminance levels. By monitoring illuminance conditions and adjusting the conversion gain parameter between first and second modes, the system optimizes measurement precision adaptively while controlling power consumption through parameter variation rather than maintaining fixed high-gain operation

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If both first and second conversion gain output signals are generated, then adaptability is improved, but device complexity increases

Engineering Contradiction:
Improvedual conversion gain operationVSAvoidcircuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extracts only the necessary conversion gain operation based on illuminance conditions. Instead of continuously performing both first and second conversion gain operations, the system extracts and executes only the required operation, thereby reducing circuit complexity and power consumption while maintaining adaptability through selective operation

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements a universal conversion gain circuit that can perform both first and second conversion gain operations using the same hardware infrastructure. The counter and comparator units are designed to handle multiple conversion gain modes universally, reducing the need for separate dedicated circuits for each mode and thereby simplifying overall device complexity while preserving adaptability

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12563318B2Analog-to-digital converting circuit for optimizing power consumption of dual conversion gain operation, operation method thereof, and image sensor including the same
Publication Date: 2026.02.24 SAMSUNG ELECTRONICS CO LTD
  • US12563318B2 patent drawing
  • US12563318B2 patent drawing
  • US12563318B2 patent drawing

AI summary

A circuit includes a comparator configured to generate a first conversion gain output signal by comparing a first pixel signal corresponding to a first conversion gain with a first ramp signal, and generate a second conversion gain output signal by comparing a second pixel signal corresponding to a second conversion gain with a second ramp signal, and a counter configured to count pulses of the first conversion gain output signal, output a counting result as a first digital signal, and determine whether an output of a second digital signal corresponding to the second conversion gain is required, based on the first digital signal. The first conversion gain is higher than the second conversion gain, and based on determining that the output of the second digital signal is not required, the counter is further configured to control the comparator such that the second conversion gain output signal is not generated.