Dual-Gate Anti-Fuse Structure for Lower Programming Voltage
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Solution Overview
Problem
Existing anti-fuse structures in semiconductor manufacturing face challenges with undesirable performance, including difficulty in reducing programming voltage and time due to the breakdown of gate dielectric layers and the need for precise voltage control to avoid structural failure.
Innovation Solution
The method involves forming an anti-fuse structure with a first gate structure and a second gate structure on a substrate, where the dielectric layer covers both, and conductive plugs with a width decreasing from top to bottom are placed on either side of the gate structures, allowing for reduced programming voltage and time by optimizing the height and thickness of the gate structures and dielectric layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the gate dielectric layer is made thinner to reduce programming voltage, then the programming voltage decreases, but the gate dielectric layer becomes more prone to breakdown and structural failure
Solution Approach 1:
The patent employs a composite gate structure consisting of a first gate structure with gate dielectric layer and a second gate structure without gate dielectric layer. This composite configuration allows the system to achieve lower programming voltage through the field effect of the second gate structure while the first gate structure's dielectric layer provides structural support and prevents breakdown, thus resolving the contradiction between reducing programming voltage and maintaining structural integrity.
2Loss of time
If the gate dielectric layer is made thinner to reduce programming time, then the programming time decreases, but the risk of structural failure increases
Solution Approach 1:
The dual-gate structure with different configurations enables faster programming by utilizing the second gate structure's direct field effect on the anti-fuse dielectric, reducing programming time. Meanwhile, the first gate structure's intact gate dielectric layer continues to provide structural stability, preventing failure during the accelerated programming process.
3Reliability
If precise voltage control is implemented to prevent structural failure, then structural integrity is maintained, but the complexity of the power module system increases
Solution Approach 1:
The patent design allows the anti-fuse structure to self-regulate the electric field distribution through its dual-gate configuration. The first and second gate structures work together to naturally distribute and control the electric field during programming, eliminating the need for complex external voltage control circuits while maintaining structural integrity.
4Productivity
If the distance between gate structures and conductive plugs is reduced to improve integration, then integration density increases, but manufacturing precision requirements become more stringent
Solution Approach 1:
The patent utilizes the vertical dimension by stacking the first and second gate structures at different heights, with the first gate structure having a higher top surface than the second gate structure. This three-dimensional arrangement allows conductive plugs to be positioned closer to the gate structures in the horizontal plane while maintaining adequate electrical isolation through the vertical dielectric layer, thereby improving integration density without excessively increasing manufacturing precision requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables easier breakdown of the anti-fuse, reducing programming voltage and time while maintaining structural integrity, simplifying power module systems and improving integration by ensuring a smaller distance between the gate structures and conductive plugs.
Implementation Method 1
enables easier breakdown of the anti-fuse, reducing programming voltage and time
Data Source
AI summary
Anti-fuse structure circuit and method of forming an anti-fuse structure circuit are provided. A substrate is provided, and an anti-fuse is formed on the substrate by forming a first gate structure and a dielectric layer on the substrate and forming conductive plugs respectively in the dielectric layer at two sides of the first gate structure. The dielectric layer covers the first gate structure, and the conductive plugs have a width decreasing from top to bottom. A second gate structure is formed on the substrate. A top surface of the first gate structure is higher than a top surface of the second gate structure. The dielectric layer also covers the second gate structure. The conductive plugs are also located respectively in the dielectric layer at two sides of the second gate structure.