Dual-Gate Array Substrate Signal Routing and Capacitance Shielding
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Solution Overview
Problem
Existing dual-gate array substrates face challenges in improving the transmission and opening ratio while reducing the cost of the drive integrated circuit, as the conventional design increases coupling capacitance and requires additional components like black matrices, which decrement the panel's transmission and opening ratio.
Innovation Solution
The dual-gate array substrate design includes alternately arranged primary and secondary signal lines, with main electrodes covering primary signal lines to shield coupling capacitance and secondary signal lines connected to common electrodes to prevent unwanted capacitance, allowing for a reduced size of main electrodes and black matrices, thereby increasing the opening ratio and transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional dual-gate array substrate design is used, then drive integrated circuit cost is reduced, but transmission and opening ratio deteriorate due to increased coupling capacitance and additional black matrices
Solution Approach 1:
The signal lines are segmented into two distinct types: primary signal lines for data transmission and secondary signal lines for common electrode control. This segmentation allows each line type to be optimized independently, with secondary lines being narrower and not requiring black matrix coverage, thereby improving transmission while maintaining the dual-gate drive structure
Solution Approach 2:
The patent extracts the function of controlling common electrodes from the primary signal lines and assigns it to dedicated secondary signal lines. This extraction eliminates the need for large main electrodes to shield coupling capacitance on the primary lines, as secondary lines are specifically designed with smaller width and different routing, thus improving opening ratio and transmission
2Reliability
If main electrodes are enlarged to shield coupling capacitance, then coupling capacitance is reduced, but opening ratio and transmission deteriorate
Solution Approach 1:
Secondary signal lines act as intermediaries between the primary signal lines and common electrodes. By introducing this intermediate structure, the patent achieves coupling capacitance management without requiring enlarged main electrodes, as the secondary lines provide dedicated control paths with optimized dimensions that do not encroach on the pixel electrode area
3Reliability
If additional black matrices are added to cover signal lines, then coupling capacitance is controlled, but transmission and opening ratio deteriorate
Solution Approach 1:
The patent applies different quality characteristics to different signal lines: primary signal lines have standard width and require black matrix coverage for coupling capacitance control, while secondary signal lines have reduced width and are positioned to minimize or eliminate the need for black matrices, thereby locally optimizing transmission in the regions where secondary lines are present
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the transmission and opening ratio of the dual-gate array substrate by eliminating coupling capacitance and reducing the need for large main electrodes and additional black matrices, leading to improved display performance and cost efficiency.
Implementation Method 1
main electrodes covering primary signal lines to shield coupling capacitance
Implementation Method 2
secondary signal lines connected to common electrodes to prevent unwanted capacitance
Data Source
AI summary
The present disclosure relates to a dual-gate array substrate and a display device. A dual-gate array substrate includes: a plurality of gate lines arranged in a first direction and each extended in a second direction that is perpendicular to the first direction; a plurality of primary signal lines and secondary signal lines arranged alternately in the second direction and extended in the first direction; and a plurality of pixel units. The primary signal lines are connected to a drive unit, and connected respectively to the pixel units that are adjacent thereto. Common electrodes include a plurality of main electrodes and a plurality of branching electrodes. An orthographic projection of the main electrode on the dual-gate array substrate does not overlap with those of corresponding ones, adjacent to the main electrode, of the pixel electrodes and at least covers the primary signal line.