Dual-Gate Differential Amplifier Power Saving Circuit
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Solution Overview
Problem
Differential amplifiers face challenges in power saving due to reduced signal amplitude with decreasing power supply voltage, leading to increased noise levels and power consumption, especially in microfabrication processes, where the voltage range of output signals is reduced, necessitating higher bias currents to maintain signal-to-noise ratio (SNR).
Innovation Solution
The use of dual-gate transistors with independently controlled gates allows for reduced power supply voltage by eliminating the need for a current source transistor, enabling power saving without degrading SNR, and incorporating cascode structures and common-mode feedback circuits to maintain output impedance and gain.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If the power supply voltage is reduced to enable power saving, then power consumption decreases, but the output signal amplitude is reduced and noise level increases, degrading signal-to-noise ratio
Solution Approach 1:
The patent changes the operating parameters of the differential amplifier by reducing the number of stacked transistor paths from three to two, thereby reducing the required voltage headroom. This allows the amplifier to operate correctly at lower power supply voltages (0.8V or below) while maintaining adequate output signal amplitude and signal-to-noise ratio, enabling power saving without performance degradation
2Use of energy by stationary object
If the power supply voltage is reduced, then power consumption decreases, but the voltage range for output signals is reduced, limiting the dynamic range
Solution Approach 1:
The patent modifies the circuit architecture by eliminating one stacking path, changing the voltage distribution parameters. This allows a larger portion of the reduced power supply voltage to be allocated to the output signal swing, maintaining an adequate voltage range for the output signal even at low power supply voltages of 0.8V or below
3Reliability
If higher bias current is used to maintain signal-to-noise ratio at reduced voltage, then signal-to-noise ratio is preserved, but power consumption increases
Solution Approach 1:
The patent extracts and removes the current source transistor from the circuit, eliminating the need for high bias current to maintain signal-to-noise ratio. By restructuring the differential amplifier to have only two stacked paths instead of three, the circuit achieves adequate SNR at lower bias currents, thereby reducing power consumption while maintaining reliability
Data Source
AI summary
Disclosed is a differential amplifier including: first and second transistors each having a first gate, a second gate, a source, and a drain open to a drain side, the first gate and the second gate being controlled independently, a differential input being supplied to between the first gates of the first and second transistors, and the sources of the first and second transistors being connected in common to a first reference potential; first and second load circuits each connected to each of drain sides of the first and second transistors; a detection circuit detecting a common-mode voltage between ones of drain sides of the first and second transistors; and a comparison and amplification circuit amplifying the common-mode voltage in comparison with a second reference potential and supplying an output signal thereof to both of the second gates of the first and second transistors.