Dual-Gate Display Panel Asymmetric Source Line Interleaving
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Solution Overview
Problem
Conventional dual-gate display panels experience visual degradation due to asymmetric driving capabilities of source lines, leading to column flickering and vertical pattern phenomena, especially when the display is shaken, as the luminance of subpixels is not consistently maintained across different frame durations.
Innovation Solution
The dual-gate display panel is designed with source lines electrically connected to subpixels in an interleaving manner, where odd-numbered source lines connect to subpixels in odd-numbered columns and even-numbered source lines connect to subpixels in even-numbered columns, ensuring that data voltages of the same magnitude but opposite polarities are supplied during different frame durations, thereby reducing the width of the vertical pattern and improving visual effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the number of source lines is reduced in a dual-gate display panel, then the area and cost of source drivers are reduced and screen-to-body ratio is raised, but visual degradation occurs due to asymmetric driving capabilities leading to column flickering and vertical pattern phenomena
Solution Approach 1:
The patent applies asymmetry by implementing different connection patterns for odd-numbered and even-numbered source lines. Odd source lines connect to odd subpixel columns while even source lines connect to even subpixel columns, creating an asymmetric interleaved structure that balances the driving capabilities across all source lines and eliminates the vertical pattern phenomenon caused by symmetric connection failures.
2Area of stationary object
If the number of source lines is reduced in a dual-gate display panel, then the screen-to-body ratio is raised, but column flickering occurs due to asymmetric driving capabilities
Solution Approach 1:
The asymmetric interleaved connection pattern distributes subpixels evenly across all source lines by connecting odd source lines to odd columns and even source lines to even columns. This asymmetric design ensures that each source line drives the same number of subpixels, stabilizing luminance output and eliminating column flickering while maintaining the reduced source line count for high screen-to-body ratio.
3Device complexity
If conventional dual-gate display panel structure is used, then the number of source lines is halved, but vertical pattern phenomenon occurs due to inconsistent luminance across different frame durations
Solution Approach 1:
The patent implements asymmetric interleaved connections where odd source lines serve odd subpixel columns and even source lines serve even subpixel columns. This asymmetric arrangement ensures uniform subpixel distribution across all source lines, maintaining consistent luminance during polarity switching between frames and eliminating vertical pattern phenomena while keeping the device complexity low through reduced source line count.
Data Source
AI summary
A dual-gate display panel, a control circuit, and a display device are provided. The display device includes the dual-gate display panel and the control circuit. The display panel includes a first subpixel, a second subpixel, a third subpixel, and a fourth subpixel, which are sequentially arranged along a first direction. The first subpixel and the third subpixel are electrically connected to a first source line. The second subpixel and the fourth subpixel are electrically connected to a second source line.