One-transistor Floating-Body DRAM Cell with Dual-Gate Control
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Solution Overview
Problem
Existing 1T floating-body DRAM cell devices face challenges in maintaining a sufficient sensing margin and retention characteristics due to miniaturization, which leads to increased threshold voltage distribution and decreased integration density.
Innovation Solution
A dual gate 1T-DRAM cell device with a non-volatile function is introduced, featuring a gate stack for charge storage and a control electrode that allows for improved 'write1' and 'write0' operations, and includes methods for non-volatile program and erase operations using techniques like Fowler-Nordheim tunneling and hot electron injection, enhancing the device's ability to control charge storage and retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If miniaturization of device is implemented to increase DRAM capacity, then integration density is improved, but sensing margin and retention characteristics deteriorate
Solution Approach 1:
The gate structure is segmented into a dual-gate configuration with a first gate electrode and a second gate electrode positioned at opposite sides of the floating body. This segmentation allows independent control of charge storage and retrieval processes, improving sensing margin and retention characteristics even in miniaturized devices with reduced floating body dimensions.
Solution Approach 2:
The invention changes the operational parameters by applying different voltages to the first and second gate electrodes during write, read, and retention operations. By controlling the voltage states of both gates independently, the device maintains reliable sensing margins and retention characteristics despite the reduced size of the floating body in miniaturized structures.
2Area of stationary object
If floating body size is reduced to increase integration density, then device area is decreased, but threshold voltage distribution increases
Solution Approach 1:
The dual-gate structure segments the control mechanism into two independent gates that can be biased separately. This allows precise control over the potential well depth and charge distribution in the reduced-size floating body, compensating for manufacturing variations and reducing threshold voltage distribution in miniaturized devices.
Solution Approach 2:
The first gate electrode serves multiple functions: it controls charge injection during write operations, maintains charge retention during standby, and enables read operations. The second gate electrode provides complementary control for the same functions. This multi-functionality allows the reduced floating body to maintain uniform electrical characteristics despite size reduction.
3Device complexity
If conventional single-gate structure is used, then device complexity is reduced, but sensing margin and charge control precision deteriorate
Solution Approach 1:
The gate control function is segmented into two independent gate electrodes positioned at opposite sides of the floating body. During write operations, one gate can be used for charge injection while the other is held at a specific potential. During read operations, the gates can be biased differentially to enhance the sensing margin by creating asymmetric potential profiles that amplify the signal from the floating body.
Solution Approach 2:
The second gate electrode acts as an intermediary that modulates the electric field in the floating body during operations. By controlling the voltage on the second gate, the device can enhance the interaction between the floating body charges and the sensing circuit, thereby improving the sensing margin without requiring a more complex multi-component structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dual gate structure improves the sensing margin and retention characteristics, reduces threshold voltage distribution, and increases integration density by allowing for precise control of electric charges, thereby enhancing the performance and integration of DRAM cell arrays.
Implementation Method 1
methods for non-volatile program and erase operations using techniques like Fowler-Nordheim tunneling
Implementation Method 2
hot electron injection, enhancing the device's ability to control charge storage and retention
Data Source
AI summary
The 1T floating-body DRAM cell device includes a floating body for storing information of the DRAM cell device, a source and a drain formed on respective sides of the floating body, a gate insulating layer formed on a top of the floating body, a gate electrode formed on a top of the gate insulating layer, a gate stack formed under the floating body and configured to have a charge storage node for storing electric charges, and a control electrode formed on a lower side of the gate stack or partially or completely surrounded by the gate stack. The DRAM cell device performs “write0” and “write1” operations or a read operation. The DRAM cell device performs a non-volatile program operation or a non-volatile erase operation.