Dual-Gate MOSFET and Free Wheel Diode for Low Recovery Loss
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor devices with insulated gate structures and free wheel diodes face challenges in reducing recovery loss and preventing self-turn-on due to noise, particularly when excess carrier injection is suppressed, as existing solutions either increase backflow loss or require complex manufacturing processes.
Innovation Solution
A semiconductor device with a dual gate structure where the first gate electrode is used for excess carrier injection suppression and the second gate electrode is used for MOSFET operation, allowing independent control to reduce recovery loss and prevent self-turn-on, and a trench gate structure with identical depth for both gates to minimize manufacturing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single gate is used for both MOSFET operation and excess carrier injection suppression, then device complexity is reduced, but the MOSFET becomes susceptible to self turn-on due to noise
Solution Approach 1:
The gate is divided into two separate gates: a first gate for MOSFET operation control and a second gate for excess carrier injection suppression. This segmentation allows independent optimization of each gate's function, enabling the second gate to suppress carrier injection and prevent self-turn-on while the first gate handles normal MOSFET switching operations.
2Reliability
If different depth trenches are formed for driving gate and diode gate, then excess carrier injection suppression is improved, but manufacturing complexity and cost increase
Solution Approach 1:
Both the first gate and second gate are formed in trenches of identical depth, allowing them to be created using the same manufacturing process steps. This merging of trench depth specifications simplifies the fabrication process while maintaining the functional distinction between the two gates through their different positions and connections.
3Loss of energy
If excess carrier injection is suppressed to reduce recovery loss, then energy loss is reduced, but the risk of self turn-on due to noise increases
Solution Approach 1:
The gate control function is segmented into two independent gates, allowing the second gate to maintain excess carrier injection suppression for reduced recovery loss while the first gate provides noise immunity to prevent self-turn-on. This segmentation resolves the trade-off between energy loss reduction and reliability.
4Reliability
If a dual gate structure with independent control is implemented, then recovery loss reduction and self turn-on prevention are achieved, but device complexity increases
Solution Approach 1:
Both gates share identical trench depth and formation processes, merging manufacturing complexity while maintaining functional independence. The gates are structurally integrated into the same device architecture, reducing the overall complexity increase despite the dual-gate functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces recovery loss and prevents self-turn-on due to noise while maintaining efficient backflow operation without increasing manufacturing complexity.
Implementation Method 1
a first gate electrode arranged in the second conductivity type layer sandwiched between the first impurity region and the first conductivity type layer through a gate insulating film
Implementation Method 2
The semiconductor switching element provides an inversion channel in a portion of the base region opposite to the first gate electrode via the gate insulating film therebetween
Implementation Method 3
the free wheel diode is formed of a p-n junction comprised of a body layer and a drift layer provided in the vertical MOSFET
Data Source
AI summary
A semiconductor device includes a switching element having: a drift layer; a base region; an element-side first impurity region in the base region; an element-side gate electrode sandwiched between the first impurity region and the drift layer; a second impurity region contacting the drift layer; an element-side first electrode coupled with the element-side first impurity region and the base region; and an element-side second electrode coupled with the second impurity region, and a FWD having: a first conductive layer; a second conductive layer; a diode-side first electrode coupled to the second conductive layer; a diode-side second electrode coupled to the first conductive layer; a diode-side first impurity region in the second conductive layer; and a diode-side gate electrode in the second conductive layer sandwiched between first impurity region and the first conductive layer and having a first gate electrode as an excess carrier injection suppression gate.