Dual Gate Insulating Layer for Oxide Semiconductor Threshold Control

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Solution Overview

Problem

Oxide semiconductor transistors face challenges in controlling threshold voltage, particularly in shifting it in the positive direction due to oxygen vacancies and trapped charges, leading to unstable electrical characteristics and normally-on characteristics.

Innovation Solution

A semiconductor device structure is implemented with a gate insulating layer containing nitrogen at 5% or lower and a second gate insulating layer with hafnium oxide, which includes charge trap states to trap electrons and create a negative electric field, stabilizing the threshold voltage and enabling a normally-off switching n-channel transistor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single gate insulating layer is used with oxide semiconductor, then the structure is simple, but the threshold voltage cannot be controlled in the positive direction and electrical characteristics are unstable

Engineering Contradiction:
Improvegate insulating layer structureVSAvoidelectrical characteristics stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The gate insulating layer is divided into two separate layers: a first gate insulating layer (silicon oxide) in contact with the oxide semiconductor layer, and a second gate insulating layer (hafnium oxide) above it. This segmentation allows each layer to perform different functions - the first layer provides a stable interface with low nitrogen content, while the second layer introduces charge trap states to control threshold voltage in the positive direction, thereby improving electrical characteristic stability without excessive complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses a composite gate insulating layer structure combining silicon oxide and hafnium oxide. The silicon oxide layer provides a stable base interface with controlled nitrogen content, while the hafnium oxide layer contributes charge trap states for threshold voltage control. This composite structure achieves both structural simplicity and electrical stability by leveraging the complementary properties of different materials.

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If nitrogen content in the gate insulating layer is high, then the manufacturing process is easier, but the threshold voltage shifts in the negative direction causing normally-on characteristics

Engineering Contradiction:
Improvegate insulating layer fabricationVSAvoidthreshold voltage control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies local quality control by specifying that the first gate insulating layer (silicon oxide) in direct contact with the oxide semiconductor must have nitrogen content of 5 at% or lower. This localized nitrogen control at the critical interface prevents negative threshold voltage shifts and normally-on characteristics, while allowing more flexibility in other regions of the device structure.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the nitrogen content parameter of the silicon oxide gate insulating layer to 5 at% or lower. This parameter change is critical for preventing negative threshold voltage shifts caused by trapped charges, thereby achieving proper normally-off transistor characteristics while maintaining manufacturing feasibility.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If charge trap states are introduced to shift threshold voltage positively, then the threshold voltage control improves, but the trapped charges are unstable and easily recombine

Engineering Contradiction:
Improvethreshold voltage controlVSAvoidcharge stability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent segments the gate insulating layer into two distinct layers with different functions. The second gate insulating layer (hafnium oxide) contains charge trap states for threshold voltage control, while the first gate insulating layer (silicon oxide) provides a stable base. This segmentation isolates the charge trapping function from the interface stability function, allowing threshold voltage control while maintaining overall system reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The composite structure of silicon oxide and hafnium oxide layers allows the hafnium oxide to provide charge trap states for positive threshold voltage control, while the silicon oxide layer provides a stable foundation. The combination of these two materials achieves both threshold voltage controllability and charge stability that neither material could achieve alone.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed structure achieves stable electrical characteristics by suppressing threshold voltage shifts and ensuring a positive threshold voltage, thereby stabilizing the transistor operation and preventing unintended channel formation.

Implementation Method 1

the second gate insulating layer includes charge trap states. It is preferable that electrons be trapped in the charge trap states and thus the second gate insulating layer be negatively charged

Methodology Applied
Scientific EffectCharge trapping: Electrostatics

Implementation Method 2

the first gate insulating layer includes an oxide in which the nitrogen content is 5 at. % or lower

Methodology Applied
Scientific EffectCharge trapping: Electrostatics

Data Source

PatentUS9299855B2Semiconductor device having dual gate insulating layers
Publication Date: 2016.03.29 SEMICON ENERGY LAB CO LTD
  • US9299855B2 patent drawing
  • US9299855B2 patent drawing
  • US9299855B2 patent drawing

AI summary

A semiconductor device includes a semiconductor layer, a gate electrode overlapping with the semiconductor layer, a first gate insulating layer between the semiconductor layer and the gate electrode, and a second gate insulating layer between the first gate insulating layer and the gate electrode. The first gate insulating layer includes an oxide in which the nitrogen content is lower than or equal to 5 at. %, and the second gate insulating layer includes charge trap states.