Dual-Gate Selector Switches for Higher-Density Memory Cells

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Solution Overview

Problem

Thin film transistors (TFTs) used in memory devices suffer from low on currents, limiting the size and memory cell density improvement in emerging memory technologies.

Innovation Solution

The development of dual-gated vertical field-controlled current selector switches, which include a dual-gate structure for TFTs, enhancing on-current and improving memory cell density by forming gated ferroelectric memory devices in the back-end-of-line (BEOL) of semiconductor devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If thin film transistors are used in memory devices, then memory cell density can be improved, but on-current is limited

Engineering Contradiction:

Improvememory cell densityVSAvoidon-current

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The transistor gate is divided into two separate gates (first gate and second gate) that can be independently controlled. This segmentation allows each gate to contribute to current flow, effectively doubling the on-current capability while maintaining the same footprint area, thus resolving the contradiction between density and current capability

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The invention transitions from a planar single-gate structure to a vertical dual-gate structure. By stacking gates in the vertical dimension rather than expanding horizontally, the device achieves higher current capability without increasing lateral area, enabling both high density and high on-current

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Reliability

If dual-gate structure is implemented, then on-current is enhanced, but device complexity increases

Engineering Contradiction:

Improveon-currentVSAvoidgate structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The fabrication process merges the formation of two gates into a unified flow, where both gates are created using similar deposition and patterning steps. This combining of operations reduces the overall process complexity despite the increased structural complexity, making the dual-gate device manufacturable with standard processes

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The dual-gate structure provides multiple functions: independent voltage control for threshold adjustment, enhanced on-current through parallel conduction paths, and improved switching characteristics. This multi-functionality justifies the additional complexity by delivering multiple performance benefits from a single structural modification

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS12563742B2Multi-gate selector switches for memory cells and methods of forming the same

Publication Date: 2026.02.24 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A memory structure includes: first and second word lines; a high-k dielectric layer disposed on the first and second word lines; a channel layer disposed on the high-k dielectric layer and comprising a semiconductor material; first and second source electrodes electrically contacting the channel layer; a first drain electrode disposed on the channel layer between the first and second source electrodes; a memory cell electrically connected to the first drain electrode; and a bit line electrically connected to the memory cell.